6a089ce0e4
Use tablegen generic tables to get the index of image intrinsic arguments. Before, the computation of which image intrinsic argument is at which index was scattered in a few places, tablegen, the SDag instruction selection and GlobalISel. This patch changes that, so only tablegen contains code to compute indices and the ImageDimIntrinsicInfo table provides these information. Differential Revision: https://reviews.llvm.org/D86270
32 lines
864 B
C++
32 lines
864 B
C++
//===- AMDGPUGlobalISelUtils -------------------------------------*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
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#define LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
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#include "llvm/CodeGen/Register.h"
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#include <tuple>
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namespace llvm {
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class MachineInstr;
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class MachineRegisterInfo;
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namespace AMDGPU {
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/// Returns Base register, constant offset, and offset def point.
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std::tuple<Register, unsigned, MachineInstr *>
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getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg);
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bool isLegalVOP3PShuffleMask(ArrayRef<int> Mask);
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}
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}
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#endif
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