52f03fe115
Support atomic fence instruction and add a regression test. Add MEMBARRIER pseudo insturction also to use it as a barrier against to the compiler optimizations. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D90112
62 lines
1.5 KiB
LLVM
62 lines
1.5 KiB
LLVM
; RUN: llc < %s -mtriple=ve | FileCheck %s
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;;; Test atomic fence for all memory order
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; Function Attrs: norecurse nounwind readnone
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define void @_Z20atomic_fence_relaxedv() {
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; CHECK-LABEL: _Z20atomic_fence_relaxedv:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: or %s11, 0, %s9
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ret void
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}
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; Function Attrs: nofree norecurse nounwind
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define void @_Z20atomic_fence_consumev() {
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; CHECK-LABEL: _Z20atomic_fence_consumev:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fencem 2
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; CHECK-NEXT: or %s11, 0, %s9
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fence acquire
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ret void
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}
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; Function Attrs: nofree norecurse nounwind
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define void @_Z20atomic_fence_acquirev() {
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; CHECK-LABEL: _Z20atomic_fence_acquirev:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fencem 2
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; CHECK-NEXT: or %s11, 0, %s9
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fence acquire
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ret void
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}
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; Function Attrs: nofree norecurse nounwind
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define void @_Z20atomic_fence_releasev() {
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; CHECK-LABEL: _Z20atomic_fence_releasev:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fencem 1
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; CHECK-NEXT: or %s11, 0, %s9
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fence release
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ret void
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}
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; Function Attrs: nofree norecurse nounwind
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define void @_Z20atomic_fence_acq_relv() {
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; CHECK-LABEL: _Z20atomic_fence_acq_relv:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fencem 3
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; CHECK-NEXT: or %s11, 0, %s9
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fence acq_rel
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ret void
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}
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; Function Attrs: nofree norecurse nounwind
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define void @_Z20atomic_fence_seq_cstv() {
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; CHECK-LABEL: _Z20atomic_fence_seq_cstv:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: fencem 3
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; CHECK-NEXT: or %s11, 0, %s9
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fence seq_cst
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ret void
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}
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