5ecd363295
This reverts commit 122efef8ee.
- Patch fixed to not reuse definitions from predecessors in EH landing pads.
- Late review suggestions (by MaskRay) have been addressed.
- M68k/pipeline.ll test updated.
- Init captures added in processBlock() to avoid capturing structured bindings.
- RISCV has this disabled for now.
Original commit message:
A new pass MachineLateInstrsCleanup is added to be run after PEI.
This is a simple pass that removes redundant and identical instructions
whenever found by scanning the MF once while keeping track of register
definitions in a map. These instructions are typically immediate loads
resulting from rematerialization, and address loads emitted by target in
eliminateFrameInde().
This is enabled by default, but a target could easily disable it by means of
'disablePass(&MachineLateInstrsCleanupID);'.
This late cleanup is naturally not "optimal" in removing instructions as it
is done by looking at phys-regs, but still quite effective. It would be
desirable to improve other parts of CodeGen and avoid these redundant
instructions in the first place, but there are no ideas for this yet.
Differential Revision: https://reviews.llvm.org/D123394
Reviewed By: RKSimon, foad, craig.topper, arsenm, asb
46 lines
1.2 KiB
LLVM
46 lines
1.2 KiB
LLVM
; RUN: llc -o - %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-apple-macosx"
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; selectiondag stack protector uses a GuardReg which the fast-isel stack
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; protection code did not but the state was not reset properly.
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; The optnone attribute on @bar forces fast-isel.
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; CHECK-LABEL: foo:
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; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip), %rax
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define void @foo() #0 {
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entry:
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%_tags = alloca [3 x i32], align 4
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ret void
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}
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; CHECK-LABEL: bar:
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; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip), %{{r.x}}
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; CHECK-DAG: movq ___stack_chk_guard@GOTPCREL(%rip), %[[GUARD:r.x]]
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; CHECK-DAG: movq {{[0-9]+}}(%rsp), %[[CANARY:r.x]]
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; CHECK: subq %[[CANARY]], %[[GUARD]]
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define void @bar() #1 {
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entry:
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%vt = alloca [2 x double], align 16
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br i1 undef, label %cleanup.4091, label %for.cond.3850
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unreachable:
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unreachable
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for.cond.3850:
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br i1 undef, label %land.rhs.3853, label %land.end.3857
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land.rhs.3853:
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br label %land.end.3857
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land.end.3857:
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%0 = phi i1 [ false, %for.cond.3850 ], [ false, %land.rhs.3853 ]
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br i1 %0, label %unreachable, label %unreachable
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cleanup.4091:
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ret void
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}
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attributes #0 = { ssp }
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attributes #1 = { noinline optnone ssp }
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