7aad8fd8f4
This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> llvm-svn: 292982
145 lines
4.9 KiB
LLVM
145 lines
4.9 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
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; GCN-LABEL: {{^}}fold_mi_v_and_0:
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; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}
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; GCN-NOT: [[RESULT]]
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; GCN: buffer_store_dword [[RESULT]]
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define void @fold_mi_v_and_0(i32 addrspace(1)* %out) {
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%x = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0
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%size = call i32 @llvm.amdgcn.groupstaticsize()
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%and = and i32 %size, %x
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store i32 %and, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}fold_mi_s_and_0:
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; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}
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; GCN-NOT: [[RESULT]]
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; GCN: buffer_store_dword [[RESULT]]
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define void @fold_mi_s_and_0(i32 addrspace(1)* %out, i32 %x) #0 {
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%size = call i32 @llvm.amdgcn.groupstaticsize()
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%and = and i32 %size, %x
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store i32 %and, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}fold_mi_v_or_0:
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; GCN: v_mbcnt_lo_u32_b32_e64 [[RESULT:v[0-9]+]]
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; GCN-NOT: [[RESULT]]
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; GCN: buffer_store_dword [[RESULT]]
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define void @fold_mi_v_or_0(i32 addrspace(1)* %out) {
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%x = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0
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%size = call i32 @llvm.amdgcn.groupstaticsize()
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%or = or i32 %size, %x
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store i32 %or, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}fold_mi_s_or_0:
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; GCN: s_load_dword [[SVAL:s[0-9]+]]
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; GCN-NOT: [[SVAL]]
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; GCN: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[SVAL]]
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; GCN-NOT: [[VVAL]]
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; GCN: buffer_store_dword [[VVAL]]
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define void @fold_mi_s_or_0(i32 addrspace(1)* %out, i32 %x) #0 {
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%size = call i32 @llvm.amdgcn.groupstaticsize()
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%or = or i32 %size, %x
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store i32 %or, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}fold_mi_v_xor_0:
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; GCN: v_mbcnt_lo_u32_b32_e64 [[RESULT:v[0-9]+]]
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; GCN-NOT: [[RESULT]]
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; GCN: buffer_store_dword [[RESULT]]
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define void @fold_mi_v_xor_0(i32 addrspace(1)* %out) {
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%x = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) #0
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%size = call i32 @llvm.amdgcn.groupstaticsize()
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%xor = xor i32 %size, %x
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store i32 %xor, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}fold_mi_s_xor_0:
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; GCN: s_load_dword [[SVAL:s[0-9]+]]
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; GCN-NOT: [[SVAL]]
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; GCN: v_mov_b32_e32 [[VVAL:v[0-9]+]], [[SVAL]]
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; GCN-NOT: [[VVAL]]
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; GCN: buffer_store_dword [[VVAL]]
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define void @fold_mi_s_xor_0(i32 addrspace(1)* %out, i32 %x) #0 {
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%size = call i32 @llvm.amdgcn.groupstaticsize()
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%xor = xor i32 %size, %x
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store i32 %xor, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}fold_mi_s_not_0:
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; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], -1{{$}}
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; GCN-NOT: [[RESULT]]
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; GCN: buffer_store_dword [[RESULT]]
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define void @fold_mi_s_not_0(i32 addrspace(1)* %out, i32 %x) #0 {
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%size = call i32 @llvm.amdgcn.groupstaticsize()
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%xor = xor i32 %size, -1
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store i32 %xor, i32 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}fold_mi_v_not_0:
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; GCN: v_bcnt_u32_b32_e64 v[[RESULT_LO:[0-9]+]], v{{[0-9]+}}, 0{{$}}
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; GCN: v_bcnt_u32_b32_e{{[0-9]+}} v[[RESULT_LO:[0-9]+]], v{{[0-9]+}}, v[[RESULT_LO]]{{$}}
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; GCN-NEXT: v_not_b32_e32 v[[RESULT_LO]]
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; GCN-NEXT: v_mov_b32_e32 v[[RESULT_HI:[0-9]+]], -1{{$}}
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; GCN-NEXT: buffer_store_dwordx2 v{{\[}}[[RESULT_LO]]:[[RESULT_HI]]{{\]}}
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define void @fold_mi_v_not_0(i64 addrspace(1)* %out) {
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%vreg = load volatile i64, i64 addrspace(1)* undef
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%ctpop = call i64 @llvm.ctpop.i64(i64 %vreg)
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%xor = xor i64 %ctpop, -1
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store i64 %xor, i64 addrspace(1)* %out
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ret void
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}
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; The neg1 appears after folding the not 0
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; GCN-LABEL: {{^}}fold_mi_or_neg1:
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; GCN: buffer_load_dwordx2
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; GCN: buffer_load_dwordx2 v{{\[}}[[VREG1_LO:[0-9]+]]:[[VREG1_HI:[0-9]+]]{{\]}}
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; GCN: v_bcnt_u32_b32_e64 v[[RESULT_LO:[0-9]+]], v{{[0-9]+}}, 0{{$}}
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; GCN: v_bcnt_u32_b32_e{{[0-9]+}} v[[RESULT_LO:[0-9]+]], v{{[0-9]+}}, v[[RESULT_LO]]{{$}}
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; GCN-DAG: v_not_b32_e32 v[[RESULT_LO]], v[[RESULT_LO]]
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; GCN-DAG: v_or_b32_e32 v[[RESULT_LO]], v[[VREG1_LO]], v[[RESULT_LO]]
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; GCN-DAG: v_mov_b32_e32 v[[RESULT_HI:[0-9]+]], v[[VREG1_HI]]
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; GCN: buffer_store_dwordx2 v{{\[}}[[RESULT_LO]]:[[RESULT_HI]]{{\]}}
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define void @fold_mi_or_neg1(i64 addrspace(1)* %out) {
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%vreg0 = load volatile i64, i64 addrspace(1)* undef
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%vreg1 = load volatile i64, i64 addrspace(1)* undef
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%ctpop = call i64 @llvm.ctpop.i64(i64 %vreg0)
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%xor = xor i64 %ctpop, -1
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%or = or i64 %xor, %vreg1
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store i64 %or, i64 addrspace(1)* %out
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ret void
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}
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; GCN-LABEL: {{^}}fold_mi_and_neg1:
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; GCN: v_bcnt_u32_b32
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; GCN: v_bcnt_u32_b32
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; GCN: v_not_b32
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; GCN: v_and_b32
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; GCN-NOT: v_and_b32
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define void @fold_mi_and_neg1(i64 addrspace(1)* %out) {
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%vreg0 = load volatile i64, i64 addrspace(1)* undef
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%vreg1 = load volatile i64, i64 addrspace(1)* undef
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%ctpop = call i64 @llvm.ctpop.i64(i64 %vreg0)
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%xor = xor i64 %ctpop, -1
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%and = and i64 %xor, %vreg1
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store i64 %and, i64 addrspace(1)* %out
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ret void
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}
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declare i64 @llvm.ctpop.i64(i64) #1
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declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #1
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declare i32 @llvm.amdgcn.groupstaticsize() #1
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attributes #0 = { nounwind }
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attributes #1 = { nounwind readnone }
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