7aad8fd8f4
This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> llvm-svn: 292982
46 lines
1.5 KiB
LLVM
46 lines
1.5 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
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declare half @llvm.amdgcn.ldexp.f16(half %a, i32 %b)
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; GCN-LABEL: {{^}}ldexp_f16
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; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
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; GCN: buffer_load_dword v[[B_I32:[0-9]+]]
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; VI: v_ldexp_f16_e32 v[[R_F16:[0-9]+]], v[[A_F16]], v[[B_I32]]
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; GCN: buffer_store_short v[[R_F16]]
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define void @ldexp_f16(
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half addrspace(1)* %r,
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half addrspace(1)* %a,
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i32 addrspace(1)* %b) {
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%a.val = load half, half addrspace(1)* %a
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%b.val = load i32, i32 addrspace(1)* %b
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%r.val = call half @llvm.amdgcn.ldexp.f16(half %a.val, i32 %b.val)
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store half %r.val, half addrspace(1)* %r
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ret void
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}
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; GCN-LABEL: {{^}}ldexp_f16_imm_a
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; GCN: buffer_load_dword v[[B_I32:[0-9]+]]
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; VI: v_ldexp_f16_e32 v[[R_F16:[0-9]+]], 2.0, v[[B_I32]]
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; GCN: buffer_store_short v[[R_F16]]
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define void @ldexp_f16_imm_a(
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half addrspace(1)* %r,
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i32 addrspace(1)* %b) {
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%b.val = load i32, i32 addrspace(1)* %b
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%r.val = call half @llvm.amdgcn.ldexp.f16(half 2.0, i32 %b.val)
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store half %r.val, half addrspace(1)* %r
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ret void
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}
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; GCN-LABEL: {{^}}ldexp_f16_imm_b
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; GCN: buffer_load_ushort v[[A_F16:[0-9]+]]
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; VI: v_ldexp_f16_e64 v[[R_F16:[0-9]+]], v[[A_F16]], 2{{$}}
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; GCN: buffer_store_short v[[R_F16]]
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define void @ldexp_f16_imm_b(
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half addrspace(1)* %r,
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half addrspace(1)* %a) {
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%a.val = load half, half addrspace(1)* %a
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%r.val = call half @llvm.amdgcn.ldexp.f16(half %a.val, i32 2)
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store half %r.val, half addrspace(1)* %r
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ret void
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}
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