7aad8fd8f4
This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> llvm-svn: 292982
59 lines
2.2 KiB
LLVM
59 lines
2.2 KiB
LLVM
; RUN: llc -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=CO-V2 -check-prefix=CI-HSA %s
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; RUN: llc -march=amdgcn -mtriple=amdgcn-unknown-amdhsa -mcpu=carrizo -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=CO-V2 -check-prefix=VI-HSA %s
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; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=MESA -check-prefix=SI-MESA %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=MESA -check-prefix=VI-MESA %s
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; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=ALL,CO-V2,SI-MESA %s
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; RUN: llc -mtriple=amdgcn-unknown-mesa3d -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefixes=ALL,CO-V2,VI-MESA %s
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declare i32 @llvm.amdgcn.workitem.id.x() #0
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declare i32 @llvm.amdgcn.workitem.id.y() #0
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declare i32 @llvm.amdgcn.workitem.id.z() #0
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; MESA: .section .AMDGPU.config
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; MESA: .long 47180
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; MESA-NEXT: .long 132{{$}}
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; ALL-LABEL {{^}}test_workitem_id_x:
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; CO-V2: enable_vgpr_workitem_id = 0
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; ALL-NOT: v0
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; ALL: {{buffer|flat}}_store_dword {{.*}}v0
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define void @test_workitem_id_x(i32 addrspace(1)* %out) #1 {
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%id = call i32 @llvm.amdgcn.workitem.id.x()
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store i32 %id, i32 addrspace(1)* %out
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ret void
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}
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; MESA: .section .AMDGPU.config
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; MESA: .long 47180
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; MESA-NEXT: .long 2180{{$}}
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; ALL-LABEL {{^}}test_workitem_id_y:
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; CO-V2: enable_vgpr_workitem_id = 1
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; ALL-NOT: v1
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; ALL: {{buffer|flat}}_store_dword {{.*}}v1
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define void @test_workitem_id_y(i32 addrspace(1)* %out) #1 {
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%id = call i32 @llvm.amdgcn.workitem.id.y()
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store i32 %id, i32 addrspace(1)* %out
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ret void
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}
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; MESA: .section .AMDGPU.config
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; MESA: .long 47180
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; MESA-NEXT: .long 4228{{$}}
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; ALL-LABEL {{^}}test_workitem_id_z:
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; CO-V2: enable_vgpr_workitem_id = 2
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; ALL-NOT: v2
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; ALL: {{buffer|flat}}_store_dword {{.*}}v2
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define void @test_workitem_id_z(i32 addrspace(1)* %out) #1 {
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%id = call i32 @llvm.amdgcn.workitem.id.z()
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store i32 %id, i32 addrspace(1)* %out
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ret void
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}
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind }
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