7aad8fd8f4
This switches to the workaround that HSA defaults to for the mesa path. This should be applied to the 4.0 branch. Patch by Vedran Miletić <vedran@miletic.net> llvm-svn: 292982
41 lines
1.5 KiB
LLVM
41 lines
1.5 KiB
LLVM
; RUN: llc -march=amdgcn -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s
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; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s
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; SI-LABEL: {{^}}global_truncstore_i32_to_i1:
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; SI: s_load_dword [[LOAD:s[0-9]+]],
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; SI: s_and_b32 [[SREG:s[0-9]+]], [[LOAD]], 1
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; SI: v_mov_b32_e32 [[VREG:v[0-9]+]], [[SREG]]
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; SI: buffer_store_byte [[VREG]],
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define void @global_truncstore_i32_to_i1(i1 addrspace(1)* %out, i32 %val) nounwind {
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%trunc = trunc i32 %val to i1
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store i1 %trunc, i1 addrspace(1)* %out, align 1
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ret void
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}
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; SI-LABEL: {{^}}global_truncstore_i64_to_i1:
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; SI: buffer_store_byte
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define void @global_truncstore_i64_to_i1(i1 addrspace(1)* %out, i64 %val) nounwind {
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%trunc = trunc i64 %val to i1
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store i1 %trunc, i1 addrspace(1)* %out, align 1
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ret void
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}
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; SI-LABEL: {{^}}s_arg_global_truncstore_i16_to_i1:
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; SI: s_load_dword [[LOAD:s[0-9]+]],
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; SI: s_and_b32 [[SREG:s[0-9]+]], [[LOAD]], 1
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; SI: v_mov_b32_e32 [[VREG:v[0-9]+]], [[SREG]]
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; SI: buffer_store_byte [[VREG]],
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define void @s_arg_global_truncstore_i16_to_i1(i1 addrspace(1)* %out, i16 %val) nounwind {
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%trunc = trunc i16 %val to i1
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store i1 %trunc, i1 addrspace(1)* %out, align 1
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ret void
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}
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; SI-LABEL: {{^}}global_truncstore_i16_to_i1:
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define void @global_truncstore_i16_to_i1(i1 addrspace(1)* %out, i16 %val0, i16 %val1) nounwind {
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%add = add i16 %val0, %val1
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%trunc = trunc i16 %add to i1
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store i1 %trunc, i1 addrspace(1)* %out, align 1
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ret void
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}
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