clang-p2996

access-non-generic.ll

NVPTX: Move InferAddressSpaces to generic code

2017-01-31 01:10:58 +00:00

add-128bit.ll

[DAGCombiner] add missing folds for scalar select of {-1,0,1}

2017-02-24 17:17:33 +00:00

addrspacecast-gvar.ll

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addrspacecast.ll

[NVPTX] Remove NVPTXFavorNonGenericAddrSpaces pass.

2016-10-31 21:51:42 +00:00

aggr-param.ll

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aggregate-return.ll

[NVPTX] Unify vectorization of load/stores of aggregate arguments and return values.

2017-02-21 22:56:05 +00:00

alias.ll

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annotations.ll

Whitespace cleanup in test/CodeGen/NVPTX/annotations.ll.

2016-12-14 22:32:55 +00:00

arg-lowering.ll

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arithmetic-fp-sm20.ll

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arithmetic-int.ll

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atomics-with-scope.ll

[NVPTX] Added intrinsics for atom.gen.{sys|cta}.* instructions.

2016-09-28 17:25:38 +00:00

atomics.ll

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bfe.ll

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branch-fold.ll

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bug17709.ll

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bug21465.ll

[NVPTX] Renamed NVPTXLowerKernelArgs -> NVPTXLowerArgs. NFC.

2016-07-20 21:44:07 +00:00

bug22246.ll

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bug22322.ll

[NVPTX] Implement llvm.fabs.f32, llvm.max.f32, etc.

2016-09-09 21:07:26 +00:00

bug26185-2.ll

[NVPTX] Fix sign/zero-extending ldg/ldu instruction selection

2016-05-02 18:12:02 +00:00

bug26185.ll

[NVPTX] Handle ldg created from sign-/zero-extended load

2016-04-05 12:38:01 +00:00

bypass-div.ll

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call-with-alloca-buffer.ll

Fix NVPTX/call-with-alloca-buffer.ll after r276777.

2016-07-26 18:28:33 +00:00

callchain.ll

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calling-conv.ll

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combine-min-max.ll

[NVPTX] Implement min/max in tablegen, rather than with custom DAGComine logic.

2017-01-18 00:09:01 +00:00

compare-int.ll

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constant-vectors.ll

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convergent-mir-call.ll

[NVPTX] Use different, convergent MIs for convergent calls.

2016-03-01 19:24:03 +00:00

convert-fp.ll

[NVPTX] Add fptosi tests to convert-fp.ll.

2017-01-15 16:55:54 +00:00

convert-int-sm20.ll

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ctlz.ll

[NVPTX] Fix function names in ctlz.ll test. Test-only change.

2017-01-18 00:07:52 +00:00

ctpop.ll

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cttz.ll

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debug-file-loc.ll

[PR27284] Reverse the ownership between DICompileUnit and DISubprogram.

2016-04-15 15:57:41 +00:00

disable-opt.ll

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div-ri.ll

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divrem-combine.ll

[NVPTX] Compute 'rem' using the result of 'div', if possible.

2016-10-28 21:44:00 +00:00

envreg.ll

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extloadv.ll

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f16-instructions.ll

[NVPTX] Fixed lowering of unaligned loads/stores of f16 scalars and vectors.

2017-03-07 20:33:38 +00:00

f16x2-instructions.ll

[NVPTX] Added support for .f16x2 instructions.

2017-02-23 22:38:24 +00:00

fast-math.ll

[NVPTX] Enable combineRepeatedFPDivisors for NVPTX.

2017-02-03 15:13:50 +00:00

fcos-no-fast-math.ll

[NVPTX] Only lower sin/cos to approximate instructions if unsafe math is allowed.

2017-01-13 18:48:13 +00:00

fma-assoc.ll

[DAGCombine] require UnsafeFPMath for re-association of addition

2017-01-31 14:35:37 +00:00

fma-disable.ll

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fma.ll

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fp16.ll

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fp-contract.ll

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fp-literals.ll

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fsin-no-fast-math.ll

[NVPTX] Only lower sin/cos to approximate instructions if unsafe math is allowed.

2017-01-13 18:48:13 +00:00

function-align.ll

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generic-to-nvvm-ir.ll

[IR] Remove the DIExpression field from DIGlobalVariable.

2016-12-20 02:09:43 +00:00

generic-to-nvvm.ll

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global-addrspace.ll

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global-ctor-empty.ll

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global-ctor.ll

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global-dtor.ll

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global-ordering.ll

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global-variable-big.ll

[NVPTX] Support global variables of integer type larger than i64.

2017-01-18 00:29:53 +00:00

global-visibility.ll

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globals_init.ll

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globals_lowering.ll

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gvar-init.ll

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half.ll

[NVPTX] Added support for half-precision floating point.

2017-01-13 20:56:17 +00:00

i1-global.ll

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i1-int-to-fp.ll

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i1-param.ll

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i8-param.ll

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idioms.ll

[NVPTX] Lower integer absolute value idiom to abs instruction.

2017-01-18 00:08:44 +00:00

imad.ll

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implicit-def.ll

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inline-asm.ll

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intrin-nocapture.ll

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intrinsic-old.ll

[NVVMIntrRange] Only set range metadata if none is already present

2016-12-22 00:51:59 +00:00

intrinsics.ll

Fix some broken CHECK lines.

2017-01-22 20:28:56 +00:00

isspacep.ll

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ld-addrspace.ll

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ld-generic.ll

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ldg-invariant.ll

[NVPTX] Add tests that invariant vector loads get lowered to ld.global.nc.

2017-02-04 01:54:56 +00:00

ldparam-v4.ll

[NVPTX] Unify vectorization of load/stores of aggregate arguments and return values.

2017-02-21 22:56:05 +00:00

ldu-i8.ll

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ldu-ldg.ll

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ldu-reg-plus-offset.ll

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lit.local.cfg

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load-sext-i1.ll

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load-with-non-coherent-cache.ll

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LoadStoreVectorizer.ll

[NVPTX] Added support for .f16x2 instructions.

2017-02-23 22:38:24 +00:00

local-stack-frame.ll

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loop-vectorize.ll

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lower-aggr-copies.ll

[DAGCombiner] Fix DebugLoc propagation when folding !(x cc y) -> (x !cc y)

2017-03-02 21:58:35 +00:00

lower-alloca.ll

NVPTX: Move InferAddressSpaces to generic code

2017-01-31 01:10:58 +00:00

lower-kernel-ptr-arg.ll

[NVPTX] Improve lowering of byval args of device functions.

2016-07-20 18:39:47 +00:00

machine-sink.ll

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MachineSink-call.ll

[NVPTX] Annotate call machine instructions as calls.

2016-02-17 17:46:50 +00:00

MachineSink-convergent.ll

NVPTX: Replace uses of cuda.syncthreads with nvvm.barrier0

2016-07-06 20:02:45 +00:00

managed.ll

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math-intrins.ll

[NVPTX] Add codegen tests for llvm.fma.

2017-01-15 16:55:37 +00:00

misaligned-vector-ldst.ll

[NVPTX] Fixed lowering of unaligned loads/stores of f16 scalars and vectors.

2017-03-07 20:33:38 +00:00

module-inline-asm.ll

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mulwide.ll

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named-barriers.ll

[NVPTX] Add intrinsics to support named barriers.

2017-01-28 16:38:15 +00:00

noduplicate-syncthreads.ll

NVPTX: Replace uses of cuda.syncthreads with nvvm.barrier0

2016-07-06 20:02:45 +00:00

nounroll.ll

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nvcl-param-align.ll

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nvvm-reflect-module-flag.ll

[NVPTX] Read __CUDA_FTZ from module flags in NVVMReflect.

2016-04-01 01:09:07 +00:00

nvvm-reflect.ll

[NVPTX] Let there be One True Way to set NVVMReflect params.

2017-01-15 16:54:35 +00:00

param-align.ll

[NVPTX] Make sure we adjust alignment at all call sites

2016-07-18 21:58:48 +00:00

param-load-store.ll

[NVPTX] Added support for .f16x2 instructions.

2017-02-23 22:38:24 +00:00

pr13291-i1-store.ll

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pr16278.ll

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pr17529.ll

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refl1.ll

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reg-copy.ll

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reg-types.ll

[NVPTX] Use untyped (.b) integer registers in PTX.

2016-08-12 22:02:19 +00:00

rotate.ll

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sched1.ll

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sched2.ll

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sext-in-reg.ll

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sext-params.ll

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shfl.ll

[NVPTX] Remove NVPTXFavorNonGenericAddrSpaces pass.

2016-10-31 21:51:42 +00:00

shift-parts.ll

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simple-call.ll

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sm-version-20.ll

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sm-version-21.ll

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sm-version-30.ll

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sm-version-32.ll

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sm-version-35.ll

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sm-version-37.ll

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sm-version-50.ll

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sm-version-52.ll

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sm-version-53.ll

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sm-version-60.ll

[NVPTX] Add sm_60, sm_61, sm_62 targets to LLVM.

2016-07-06 21:06:10 +00:00

sm-version-61.ll

[NVPTX] Add sm_60, sm_61, sm_62 targets to LLVM.

2016-07-06 21:06:10 +00:00

sm-version-62.ll

[NVPTX] Add sm_60, sm_61, sm_62 targets to LLVM.

2016-07-06 21:06:10 +00:00

speculative-execution-divergent-target.ll

Move divergent-target test into CodeGen/NVPTX because it requires an NVPTX target.

2016-04-15 01:20:52 +00:00

sqrt-approx.ll

[NVPTX] Compute approx sqrt as 1/rsqrt(x) rather than x*rsqrt(x).

2017-01-31 23:08:57 +00:00

st-addrspace.ll

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st-generic.ll

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surf-read-cuda.ll

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surf-read.ll

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surf-write-cuda.ll

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surf-write.ll

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symbol-naming.ll

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TailDuplication-convergent.ll

NVPTX: Replace uses of cuda.syncthreads with nvvm.barrier0

2016-07-06 20:02:45 +00:00

tex-read-cuda.ll

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tex-read.ll

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texsurf-queries.ll

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tid-range.ll

[SelectionDAG] Correctly transform range metadata to AssertZExt

2017-01-06 00:11:46 +00:00

tuple-literal.ll

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vec8.ll

[NVPTX] Unify vectorization of load/stores of aggregate arguments and return values.

2017-02-21 22:56:05 +00:00

vec-param-load.ll

[NVPTX] Unify vectorization of load/stores of aggregate arguments and return values.

2017-02-21 22:56:05 +00:00

vector-args.ll

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vector-call.ll

[NVPTX] Unify vectorization of load/stores of aggregate arguments and return values.

2017-02-21 22:56:05 +00:00

vector-compare.ll

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vector-global.ll

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vector-loads.ll

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vector-select.ll

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vector-stores.ll

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weak-global.ll

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weak-linkage.ll

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zero-cs.ll

llvm/test/CodeGen/NVPTX/zero-cs.ll: Relax an expression to match in -Asserts.

2016-09-21 04:43:11 +00:00

zeroext-32bit.ll

Only emit extension for zeroext/signext arguments if type is < 32 bits

2016-06-27 20:22:22 +00:00