clang-p2996

Files

Michael Maitland 58f1640635 [RISCV][llvm-mca] Use correct LMUL and SEW for strided loads and stores (#76869 )

The pseudos for strided loads and stores use the SEW coming from the
name. For example, vlse8 has SEW=8 and vlse16 has SEW=16.

When llvm-mca tries to lookup (VLSE8_V, SEW=S, LMUL=L) in the inverse
pseudo table, a result will only be found when S=8, where S was set from
the previous vsetvli instruction. Instead, for a match to be found, we
must lookup (VLSE8_V, SEW=8, LMUL=L') where L' is the EMUL which was
calculated by scaling the LMUL and SEW from the previous vsetvli and the
SEW=8.

2024-01-04 15:40:30 -05:00

benchmarks

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bindings

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cmake

Revert "[mlir] Consider mlir-linalg-ods-gen as a tablegen tool in build (#75093 )"

2024-01-04 02:01:16 +05:00

docs

[llvm-cxxfilt] Added the option --no-params (#75348 )

2024-01-04 20:42:51 +04:00

examples

[Orc][examples] Revisit advanced LLJIT examples and tests (#76236 )

2024-01-03 09:51:18 +01:00

include

[AArch64] Correct features for Arm Cortex-A78C, Cortex-X1C and Cortex-X2 (#76932 )

2024-01-04 20:06:47 +00:00

lib

[RISCV][llvm-mca] Use correct LMUL and SEW for strided loads and stores (#76869 )

2024-01-04 15:40:30 -05:00

projects

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resources

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runtimes

[CMake][runtimes] Check LLVM_ENABLE_PROJECTS for libc (#76845 )

2024-01-04 12:14:32 -08:00

test

[RISCV][llvm-mca] Use correct LMUL and SEW for strided loads and stores (#76869 )

2024-01-04 15:40:30 -05:00

tools

[llvm-cxxfilt] Added the option --no-params (#75348 )

2024-01-04 20:42:51 +04:00

unittests

[AArch64] Correct features for Arm Cortex-A78C, Cortex-X1C and Cortex-X2 (#76932 )

2024-01-04 20:06:47 +00:00

utils

[llvm] Add support for running tests as root (#75285 )

2024-01-04 11:25:09 -08:00

.clang-format

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.clang-tidy

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.gitattributes

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.gitignore

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CMakeLists.txt

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CODE_OWNERS.TXT

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configure

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CREDITS.TXT

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LICENSE.TXT

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llvm.spec.in

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README.txt

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RELEASE_TESTERS.TXT

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README.txt

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