2ed751bd47
are defined as enumerations. Current bits include:
eEmulateInstructionOptionAutoAdvancePC
eEmulateInstructionOptionIgnoreConditions
Modified the EmulateInstruction class to have a few more pure virtuals that
can help clients understand how many instructions the emulator can handle:
virtual bool
SupportsEmulatingIntructionsOfType (InstructionType inst_type) = 0;
Where instruction types are defined as:
//------------------------------------------------------------------
/// Instruction types
//------------------------------------------------------------------
typedef enum InstructionType
{
eInstructionTypeAny, // Support for any instructions at all (at least one)
eInstructionTypePrologueEpilogue, // All prologue and epilogue instructons that push and pop register values and modify sp/fp
eInstructionTypePCModifying, // Any instruction that modifies the program counter/instruction pointer
eInstructionTypeAll // All instructions of any kind
} InstructionType;
This allows use to tell what an emulator can do and also allows us to request
these abilities when we are finding the plug-in interface.
Added the ability for an EmulateInstruction class to get the register names
for any registers that are part of the emulation. This helps with being able
to dump and log effectively.
The UnwindAssembly class now stores the architecture it was created with in
case it is needed later in the unwinding process.
Added a function that can tell us DWARF register names for ARM that goes
along with the source/Utility/ARM_DWARF_Registers.h file:
source/Utility/ARM_DWARF_Registers.c
Took some of plug-ins out of the lldb_private namespace.
llvm-svn: 130189
647 lines
23 KiB
C++
647 lines
23 KiB
C++
//===-- EmulateInstruction.h ------------------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "lldb/Core/EmulateInstruction.h"
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#include "lldb/Core/Address.h"
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#include "lldb/Core/DataBufferHeap.h"
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#include "lldb/Core/DataExtractor.h"
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#include "lldb/Core/Error.h"
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#include "lldb/Core/PluginManager.h"
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#include "lldb/Core/StreamString.h"
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#include "lldb/Host/Endian.h"
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#include "lldb/Target/Process.h"
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#include "lldb/Target/RegisterContext.h"
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#include "lldb/Target/Target.h"
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#include "lldb/Target/Thread.h"
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#include "Plugins/Instruction/ARM/EmulateInstructionARM.h"
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using namespace lldb;
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using namespace lldb_private;
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EmulateInstruction*
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EmulateInstruction::FindPlugin (const ArchSpec &arch, InstructionType supported_inst_type, const char *plugin_name)
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{
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EmulateInstructionCreateInstance create_callback = NULL;
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if (plugin_name)
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{
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create_callback = PluginManager::GetEmulateInstructionCreateCallbackForPluginName (plugin_name);
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if (create_callback)
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{
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EmulateInstruction *emulate_insn_ptr = create_callback(arch, supported_inst_type);
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if (emulate_insn_ptr)
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return emulate_insn_ptr;
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}
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}
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else
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{
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for (uint32_t idx = 0; (create_callback = PluginManager::GetEmulateInstructionCreateCallbackAtIndex(idx)) != NULL; ++idx)
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{
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EmulateInstruction *emulate_insn_ptr = create_callback(arch, supported_inst_type);
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if (emulate_insn_ptr)
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return emulate_insn_ptr;
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}
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}
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return NULL;
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}
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EmulateInstruction::EmulateInstruction (const ArchSpec &arch) :
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m_arch (arch),
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m_baton (NULL),
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m_read_mem_callback (&ReadMemoryDefault),
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m_write_mem_callback (&WriteMemoryDefault),
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m_read_reg_callback (&ReadRegisterDefault),
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m_write_reg_callback (&WriteRegisterDefault),
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m_opcode_pc (LLDB_INVALID_ADDRESS)
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{
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::memset (&m_opcode, 0, sizeof (m_opcode));
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}
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uint64_t
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EmulateInstruction::ReadRegisterUnsigned (uint32_t reg_kind, uint32_t reg_num, uint64_t fail_value, bool *success_ptr)
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{
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uint64_t uval64 = 0;
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bool success = m_read_reg_callback (this, m_baton, reg_kind, reg_num, uval64);
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if (success_ptr)
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*success_ptr = success;
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if (!success)
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uval64 = fail_value;
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return uval64;
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}
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bool
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EmulateInstruction::WriteRegisterUnsigned (const Context &context, uint32_t reg_kind, uint32_t reg_num, uint64_t reg_value)
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{
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return m_write_reg_callback (this, m_baton, context, reg_kind, reg_num, reg_value);
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}
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uint64_t
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EmulateInstruction::ReadMemoryUnsigned (const Context &context, lldb::addr_t addr, size_t byte_size, uint64_t fail_value, bool *success_ptr)
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{
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uint64_t uval64 = 0;
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bool success = false;
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if (byte_size <= 8)
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{
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uint8_t buf[sizeof(uint64_t)];
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size_t bytes_read = m_read_mem_callback (this, m_baton, context, addr, buf, byte_size);
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if (bytes_read == byte_size)
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{
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uint32_t offset = 0;
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DataExtractor data (buf, byte_size, GetByteOrder(), GetAddressByteSize());
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uval64 = data.GetMaxU64 (&offset, byte_size);
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success = true;
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}
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}
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if (success_ptr)
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*success_ptr = success;
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if (!success)
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uval64 = fail_value;
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return uval64;
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}
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bool
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EmulateInstruction::WriteMemoryUnsigned (const Context &context,
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lldb::addr_t addr,
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uint64_t uval,
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size_t uval_byte_size)
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{
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StreamString strm(Stream::eBinary, GetAddressByteSize(), GetByteOrder());
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strm.PutMaxHex64 (uval, uval_byte_size);
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size_t bytes_written = m_write_mem_callback (this, m_baton, context, addr, strm.GetData(), uval_byte_size);
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if (bytes_written == uval_byte_size)
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return true;
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return false;
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}
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void
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EmulateInstruction::SetBaton (void *baton)
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{
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m_baton = baton;
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}
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void
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EmulateInstruction::SetCallbacks (ReadMemory read_mem_callback,
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WriteMemory write_mem_callback,
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ReadRegister read_reg_callback,
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WriteRegister write_reg_callback)
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{
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m_read_mem_callback = read_mem_callback;
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m_write_mem_callback = write_mem_callback;
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m_read_reg_callback = read_reg_callback;
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m_write_reg_callback = write_reg_callback;
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}
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void
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EmulateInstruction::SetReadMemCallback (ReadMemory read_mem_callback)
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{
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m_read_mem_callback = read_mem_callback;
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}
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void
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EmulateInstruction::SetWriteMemCallback (WriteMemory write_mem_callback)
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{
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m_write_mem_callback = write_mem_callback;
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}
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void
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EmulateInstruction::SetReadRegCallback (ReadRegister read_reg_callback)
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{
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m_read_reg_callback = read_reg_callback;
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}
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void
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EmulateInstruction::SetWriteRegCallback (WriteRegister write_reg_callback)
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{
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m_write_reg_callback = write_reg_callback;
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}
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//
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// Read & Write Memory and Registers callback functions.
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//
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size_t
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EmulateInstruction::ReadMemoryFrame (EmulateInstruction *instruction,
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void *baton,
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const Context &context,
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lldb::addr_t addr,
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void *dst,
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size_t length)
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{
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if (!baton)
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return 0;
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StackFrame *frame = (StackFrame *) baton;
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DataBufferSP data_sp (new DataBufferHeap (length, '\0'));
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Error error;
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size_t bytes_read = frame->GetThread().GetProcess().ReadMemory (addr, data_sp->GetBytes(), data_sp->GetByteSize(),
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error);
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if (bytes_read > 0)
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((DataBufferHeap *) data_sp.get())->CopyData (dst, length);
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return bytes_read;
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}
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size_t
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EmulateInstruction::WriteMemoryFrame (EmulateInstruction *instruction,
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void *baton,
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const Context &context,
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lldb::addr_t addr,
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const void *dst,
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size_t length)
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{
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if (!baton)
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return 0;
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StackFrame *frame = (StackFrame *) baton;
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lldb::DataBufferSP data_sp (new DataBufferHeap (dst, length));
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if (data_sp)
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{
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length = data_sp->GetByteSize();
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if (length > 0)
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{
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Error error;
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size_t bytes_written = frame->GetThread().GetProcess().WriteMemory (addr, data_sp->GetBytes(), length,
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error);
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return bytes_written;
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}
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}
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return 0;
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}
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bool
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EmulateInstruction::ReadRegisterFrame (EmulateInstruction *instruction,
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void *baton,
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uint32_t reg_kind,
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uint32_t reg_num,
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uint64_t ®_value)
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{
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if (!baton)
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return false;
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StackFrame *frame = (StackFrame *) baton;
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RegisterContext *reg_context = frame->GetRegisterContext().get();
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Scalar value;
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uint32_t internal_reg_num = reg_context->ConvertRegisterKindToRegisterNumber (reg_kind, reg_num);
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if (internal_reg_num == LLDB_INVALID_REGNUM)
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return false;
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if (reg_context->ReadRegisterValue (internal_reg_num, value))
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{
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reg_value = value.GetRawBits64 (0);
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return true;
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}
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return false;
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}
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bool
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EmulateInstruction::WriteRegisterFrame (EmulateInstruction *instruction,
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void *baton,
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const Context &context,
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uint32_t reg_kind,
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uint32_t reg_num,
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uint64_t reg_value)
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{
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if (!baton)
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return false;
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StackFrame *frame = (StackFrame *) baton;
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RegisterContext *reg_context = frame->GetRegisterContext().get();
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Scalar value (reg_value);
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uint32_t internal_reg_num = reg_context->ConvertRegisterKindToRegisterNumber (reg_kind, reg_num);
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if (internal_reg_num != LLDB_INVALID_REGNUM)
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return reg_context->WriteRegisterValue (internal_reg_num, value);
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else
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return false;
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}
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size_t
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EmulateInstruction::ReadMemoryDefault (EmulateInstruction *instruction,
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void *baton,
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const Context &context,
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lldb::addr_t addr,
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void *dst,
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size_t length)
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{
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PrintContext ("Read from memory", context);
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fprintf (stdout, " Read from Memory (address = %p, length = %d)\n",(void *) addr, (uint32_t) length);
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*((uint64_t *) dst) = 0xdeadbeef;
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return length;
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}
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size_t
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EmulateInstruction::WriteMemoryDefault (EmulateInstruction *instruction,
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void *baton,
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const Context &context,
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lldb::addr_t addr,
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const void *dst,
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size_t length)
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{
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PrintContext ("Write to memory", context);
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fprintf (stdout, " Write to Memory (address = %p, length = %d)\n", (void *) addr, (uint32_t) length);
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return length;
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}
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bool
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EmulateInstruction::ReadRegisterDefault (EmulateInstruction *instruction,
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void *baton,
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uint32_t reg_kind,
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uint32_t reg_num,
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uint64_t ®_value)
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{
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std::string reg_name;
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TranslateRegister (reg_kind, reg_num, reg_name);
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fprintf (stdout, " Read Register (%s)\n", reg_name.c_str());
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reg_value = 24;
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return true;
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}
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bool
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EmulateInstruction::WriteRegisterDefault (EmulateInstruction *instruction,
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void *baton,
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const Context &context,
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uint32_t reg_kind,
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uint32_t reg_num,
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uint64_t reg_value)
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{
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PrintContext ("Write to register", context);
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std::string reg_name;
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TranslateRegister (reg_kind, reg_num, reg_name);
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fprintf (stdout, " Write to Register (%s), value = 0x%llx\n", reg_name.c_str(), reg_value);
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return true;
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}
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void
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EmulateInstruction::PrintContext (const char *context_type, const Context &context)
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{
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switch (context.type)
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{
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case eContextReadOpcode:
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fprintf (stdout, " %s context: Reading an Opcode\n", context_type);
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break;
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case eContextImmediate:
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fprintf (stdout, " %s context: Immediate\n", context_type);
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break;
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case eContextPushRegisterOnStack:
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fprintf (stdout, " %s context: Pushing a register onto the stack.\n", context_type);
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break;
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case eContextPopRegisterOffStack:
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fprintf (stdout, " %s context: Popping a register off the stack.\n", context_type);
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break;
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case eContextAdjustStackPointer:
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fprintf (stdout, " %s context: Adjusting the stack pointer.\n", context_type);
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break;
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case eContextAdjustBaseRegister:
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fprintf (stdout, " %s context: Adjusting (writing value back to) a base register.\n", context_type);
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break;
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case eContextRegisterPlusOffset:
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fprintf (stdout, " %s context: Register plus offset\n", context_type);
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break;
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case eContextRegisterStore:
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fprintf (stdout, " %s context: Storing a register.\n", context_type);
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break;
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case eContextRegisterLoad:
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fprintf (stdout, " %s context: Loading a register.\n", context_type);
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break;
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case eContextRelativeBranchImmediate:
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fprintf (stdout, " %s context: Relative branch immediate\n", context_type);
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break;
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case eContextAbsoluteBranchRegister:
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fprintf (stdout, " %s context: Absolute branch register\n", context_type);
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break;
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case eContextSupervisorCall:
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fprintf (stdout, " %s context: Performing a supervisor call.\n", context_type);
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break;
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case eContextTableBranchReadMemory:
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fprintf (stdout, " %s context: Table branch read memory\n", context_type);
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break;
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case eContextWriteRegisterRandomBits:
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fprintf (stdout, " %s context: Write random bits to a register\n", context_type);
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break;
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case eContextWriteMemoryRandomBits:
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fprintf (stdout, " %s context: Write random bits to a memory address\n", context_type);
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break;
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case eContextMultiplication:
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fprintf (stdout, " %s context: Performing a multiplication\n", context_type);
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break;
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case eContextAddition:
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fprintf (stdout, " %s context: Performing an addition\n", context_type);
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break;
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case eContextReturnFromException:
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fprintf (stdout, " %s context: Returning from an exception\n", context_type);
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break;
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default:
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fprintf (stdout, " %s context: Unrecognized context.\n", context_type);
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break;
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}
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switch (context.info_type)
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{
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case eInfoTypeRegisterPlusOffset:
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{
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std::string reg_name;
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TranslateRegister (context.info.RegisterPlusOffset.reg.kind,
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context.info.RegisterPlusOffset.reg.num,
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reg_name);
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fprintf (stdout, " Info type: Register plus offset (%s +/- %lld)\n", reg_name.c_str(),
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context.info.RegisterPlusOffset.signed_offset);
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}
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break;
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case eInfoTypeRegisterPlusIndirectOffset:
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{
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std::string base_reg_name;
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std::string offset_reg_name;
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TranslateRegister (context.info.RegisterPlusIndirectOffset.base_reg.kind,
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context.info.RegisterPlusIndirectOffset.base_reg.num,
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base_reg_name);
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TranslateRegister (context.info.RegisterPlusIndirectOffset.offset_reg.kind,
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context.info.RegisterPlusIndirectOffset.offset_reg.num,
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offset_reg_name);
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fprintf (stdout, " Info type: Register plus indirect offset (%s +/- %s)\n",
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base_reg_name.c_str(),
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offset_reg_name.c_str());
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}
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break;
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case eInfoTypeRegisterToRegisterPlusOffset:
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{
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std::string base_reg_name;
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std::string data_reg_name;
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TranslateRegister (context.info.RegisterToRegisterPlusOffset.base_reg.kind,
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context.info.RegisterToRegisterPlusOffset.base_reg.num,
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base_reg_name);
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TranslateRegister (context.info.RegisterToRegisterPlusOffset.data_reg.kind,
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context.info.RegisterToRegisterPlusOffset.data_reg.num,
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data_reg_name);
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fprintf (stdout, " Info type: Register plus offset (%s +/- %lld) and data register (%s)\n",
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base_reg_name.c_str(), context.info.RegisterToRegisterPlusOffset.offset,
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data_reg_name.c_str());
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}
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break;
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case eInfoTypeRegisterToRegisterPlusIndirectOffset:
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{
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std::string base_reg_name;
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std::string offset_reg_name;
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std::string data_reg_name;
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TranslateRegister (context.info.RegisterToRegisterPlusIndirectOffset.base_reg.kind,
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context.info.RegisterToRegisterPlusIndirectOffset.base_reg.num,
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base_reg_name);
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TranslateRegister (context.info.RegisterToRegisterPlusIndirectOffset.offset_reg.kind,
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context.info.RegisterToRegisterPlusIndirectOffset.offset_reg.num,
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offset_reg_name);
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TranslateRegister (context.info.RegisterToRegisterPlusIndirectOffset.data_reg.kind,
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context.info.RegisterToRegisterPlusIndirectOffset.data_reg.num,
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data_reg_name);
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fprintf (stdout, " Info type: Register plus indirect offset (%s +/- %s) and data register (%s)\n",
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base_reg_name.c_str(), offset_reg_name.c_str(), data_reg_name.c_str());
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}
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break;
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case eInfoTypeRegisterRegisterOperands:
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{
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std::string op1_reg_name;
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std::string op2_reg_name;
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TranslateRegister (context.info.RegisterRegisterOperands.operand1.kind,
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context.info.RegisterRegisterOperands.operand1.num,
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op1_reg_name);
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TranslateRegister (context.info.RegisterRegisterOperands.operand2.kind,
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context.info.RegisterRegisterOperands.operand2.num,
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op2_reg_name);
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fprintf (stdout, " Info type: Register operands for binary op (%s, %s)\n",
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op1_reg_name.c_str(),
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op2_reg_name.c_str());
|
|
}
|
|
break;
|
|
case eInfoTypeOffset:
|
|
fprintf (stdout, " Info type: signed offset (%lld)\n", context.info.signed_offset);
|
|
break;
|
|
|
|
case eInfoTypeRegister:
|
|
{
|
|
std::string reg_name;
|
|
TranslateRegister (context.info.reg.kind, context.info.reg.num, reg_name);
|
|
fprintf (stdout, " Info type: Register (%s)\n", reg_name.c_str());
|
|
}
|
|
break;
|
|
|
|
case eInfoTypeImmediate:
|
|
fprintf (stdout, " Info type: Immediate (%lld)\n", context.info.immediate);
|
|
break;
|
|
|
|
case eInfoTypeImmediateSigned:
|
|
fprintf (stdout, " Info type: Signed immediate (%lld)\n", context.info.signed_immediate);
|
|
break;
|
|
|
|
case eInfoTypeAddress:
|
|
fprintf (stdout, " Info type: Address (%p)\n", (void *) context.info.address);
|
|
break;
|
|
|
|
case eInfoTypeModeAndImmediate:
|
|
{
|
|
std::string mode_name;
|
|
|
|
if (context.info.ModeAndImmediate.mode == EmulateInstructionARM::eModeARM)
|
|
mode_name = "ARM";
|
|
else if (context.info.ModeAndImmediate.mode == EmulateInstructionARM::eModeThumb)
|
|
mode_name = "Thumb";
|
|
else
|
|
mode_name = "Unknown mode";
|
|
|
|
fprintf (stdout, " Info type: Mode (%s) and immediate (%d)\n", mode_name.c_str(),
|
|
context.info.ModeAndImmediate.data_value);
|
|
}
|
|
break;
|
|
|
|
case eInfoTypeModeAndImmediateSigned:
|
|
{
|
|
std::string mode_name;
|
|
|
|
if (context.info.ModeAndImmediateSigned.mode == EmulateInstructionARM::eModeARM)
|
|
mode_name = "ARM";
|
|
else if (context.info.ModeAndImmediateSigned.mode == EmulateInstructionARM::eModeThumb)
|
|
mode_name = "Thumb";
|
|
else
|
|
mode_name = "Unknown mode";
|
|
|
|
fprintf (stdout, " Info type: Mode (%s) and signed immediate (%d)\n", mode_name.c_str(),
|
|
context.info.ModeAndImmediateSigned.signed_data_value);
|
|
}
|
|
break;
|
|
|
|
case eInfoTypeMode:
|
|
{
|
|
std::string mode_name;
|
|
|
|
if (context.info.mode == EmulateInstructionARM::eModeARM)
|
|
mode_name = "ARM";
|
|
else if (context.info.mode == EmulateInstructionARM::eModeThumb)
|
|
mode_name = "Thumb";
|
|
else
|
|
mode_name = "Unknown mode";
|
|
|
|
fprintf (stdout, " Info type: Mode (%s)\n", mode_name.c_str());
|
|
}
|
|
break;
|
|
|
|
case eInfoTypeNoArgs:
|
|
fprintf (stdout, " Info type: no arguments\n");
|
|
break;
|
|
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
bool
|
|
EmulateInstruction::SetInstruction (const Opcode &opcode, const Address &inst_addr, Target *target)
|
|
{
|
|
m_opcode = opcode;
|
|
m_opcode_pc = LLDB_INVALID_ADDRESS;
|
|
if (inst_addr.IsValid())
|
|
{
|
|
if (target)
|
|
m_opcode_pc = inst_addr.GetLoadAddress (target);
|
|
if (m_opcode_pc == LLDB_INVALID_ADDRESS)
|
|
m_opcode_pc = inst_addr.GetFileAddress ();
|
|
}
|
|
return true;
|
|
}
|
|
|
|
|
|
const char *
|
|
EmulateInstruction::TranslateRegister (uint32_t kind, uint32_t num, std::string &name)
|
|
{
|
|
if (kind == eRegisterKindGeneric)
|
|
{
|
|
switch (num)
|
|
{
|
|
case LLDB_REGNUM_GENERIC_PC: name = "pc"; break;
|
|
case LLDB_REGNUM_GENERIC_SP: name = "sp"; break;
|
|
case LLDB_REGNUM_GENERIC_FP: name = "fp"; break;
|
|
case LLDB_REGNUM_GENERIC_RA: name = "ra"; break;
|
|
case LLDB_REGNUM_GENERIC_FLAGS: name = "flags"; break;
|
|
default: name.clear(); break;
|
|
}
|
|
if (!name.empty())
|
|
return name.c_str();
|
|
}
|
|
const char *kind_cstr = NULL;
|
|
|
|
switch (kind)
|
|
{
|
|
case eRegisterKindGCC: // the register numbers seen in eh_frame
|
|
kind_cstr = "gcc";
|
|
break;
|
|
|
|
case eRegisterKindDWARF: // the register numbers seen DWARF
|
|
kind_cstr = "dwarf";
|
|
break;
|
|
|
|
case eRegisterKindGeneric: // insn ptr reg, stack ptr reg, etc not specific to any particular target
|
|
kind_cstr = "generic";
|
|
break;
|
|
|
|
case eRegisterKindGDB: // the register numbers gdb uses (matches stabs numbers?)
|
|
kind_cstr = "gdb";
|
|
break;
|
|
|
|
case eRegisterKindLLDB: // lldb's internal register numbers
|
|
kind_cstr = "lldb";
|
|
break;
|
|
}
|
|
|
|
|
|
StreamString sstr;
|
|
sstr.Printf ("%s(%u)", kind_cstr, num);
|
|
name.swap (sstr.GetString());
|
|
return name.c_str();
|
|
}
|
|
|
|
|