Michael Maitland 2f400a2fd7 [GISEL] Add G_VSCALE instruction (#84542)

2024-03-12 20:22:49 -04:00

..

AArch64

[GISEL] Add G_VSCALE instruction (#84542)

2024-03-12 20:22:49 -04:00

AMDGPU

[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035)

2024-03-12 10:30:39 -07:00

ARC

…

ARM

[llvm][arm] add T1 and T2 assembly options for vlldm and vlstm

2024-03-11 14:27:28 +00:00

AVR

…

BPF

…

CSKY

…

DirectX

[DirectX][NFC] Model precise overload type specification of DXIL Ops (#83917)

2024-03-12 16:51:18 -04:00

Generic

…

Hexagon

[Hexagon] Fix shift value when folding shl DAG node (#83853)

2024-03-06 08:17:02 -06:00

Inputs

…

Lanai

…

LoongArch

[LoongArch] Make sure that the LoongArchISD::BSTRINS node uses the correct MSB value (#84454)

2024-03-11 08:59:17 +08:00

M68k

…

Mips

[Mips] Fix missing sign extension in expansion of sub-word atomic max (#77072)

2024-03-08 15:41:31 -05:00

MIR

…

MLRegAlloc

…

MSP430

…

NVPTX

Revert "[NVPTX] Add support for atomic add for f16 type" (#84918)

2024-03-12 15:01:18 +01:00

PowerPC

[PPC][NFC] add an option to expose the bug in 74951

2024-03-07 20:52:44 -05:00

RISCV

[RISC-V] Bad immediate value for Zcmp instructions with E extension (#84925)

2024-03-12 16:26:49 +01:00

SPARC

…

SPIRV

[SPIR-V] Insert a bitcast before load/store instruction to keep SPIR-V code valid (#84069)

2024-03-08 08:31:56 +01:00

SystemZ

…

Thumb

Revert "Convert many LivePhysRegs uses to LiveRegUnits (#83905)"

2024-03-07 08:20:26 +00:00

Thumb2

Revert "[ARM] R11 not pushed adjacent to link register with PAC-M and… (#84019)

2024-03-05 14:34:43 +00:00

VE

…

WebAssembly

[WebAssembly] Use RefTypeMem2Local instead of Mem2Reg (#83196)

2024-03-05 19:54:41 -08:00

WinCFGuard

…

WinEH

…

X86

[X86] Fix determining if globals with size <8 bits are large (#84975)

2024-03-12 12:43:29 -07:00

XCore

…

Xtensa

…