5b5c21d772
This reverts commit 2bd369b48d.
That commit triggered failed assertions:
$ cat repro.c
short *a;
int b;
void h() {
short *c = a;
b = 0;
for (; b < 4; b++) {
unsigned d = a[b] + a[b + 4 * 2], e = a[b] - a[b + 4 * 2],
f = (a[b + 4] >> 1) - a[b + 4 * 3],
g = a[b + 4] + (a[b + 4 * 3] >> 1);
c[b] = g;
c[b + 4] = e + f;
c[b + 4 * 2] = e - f;
c[b + 4 * 3] = d - g;
}
}
$ clang -target aarch64-linux-gnu -c -O2 repro.c
clang: ../lib/Transforms/Vectorize/SLPVectorizer.cpp:12503: llvm::Value* llvm::slpvectorizer::BoUpSLP::vectorizeTree(llvm::slpvectorizer::BoUpSLP::TreeEntry*, bool): Assertion `(MinBWs.contains(getOperandEntry(E, 0)) || MinBWs.contains(getOperandEntry(E, 1))) && "Expected item in MinBWs."' failed.
34 lines
1.4 KiB
LLVM
34 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -slp-threshold=-3 < %s | FileCheck %s
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define void @t(i64 %v) {
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; CHECK-LABEL: define void @t(
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; CHECK-SAME: i64 [[V:%.*]]) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i64> poison, i64 [[V]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i64> [[TMP0]], <4 x i64> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP2:%.*]] = trunc <4 x i64> [[TMP1]] to <4 x i16>
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; CHECK-NEXT: [[TMP3:%.*]] = mul <4 x i16> [[TMP2]], <i16 5, i16 6, i16 3, i16 2>
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; CHECK-NEXT: [[TMP4:%.*]] = call i16 @llvm.vector.reduce.or.v4i16(<4 x i16> [[TMP3]])
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; CHECK-NEXT: [[TMP5:%.*]] = sext i16 [[TMP4]] to i32
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; CHECK-NEXT: [[TMP6:%.*]] = and i32 [[TMP5]], 65535
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; CHECK-NEXT: store i32 [[TMP6]], ptr null, align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%conv12.1.i = trunc i64 %v to i32
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%mul.i.1.i = mul i32 %conv12.1.i, 2
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%conv12.i = trunc i64 %v to i32
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%mul.i.i = mul i32 %conv12.i, 3
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%conv14104.i = or i32 %mul.i.1.i, %mul.i.i
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%conv12.1.i.1 = trunc i64 %v to i32
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%mul.i.1.i.1 = mul i32 %conv12.1.i.1, 6
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%conv12.i.1 = trunc i64 %v to i32
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%mul.i.i.1 = mul i32 %conv12.i.1, 5
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%conv14104.i.1 = or i32 %mul.i.1.i.1, %mul.i.i.1
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%0 = or i32 %conv14104.i, %conv14104.i.1
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%1 = and i32 %0, 65535
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store i32 %1, ptr null, align 4
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ret void
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}
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