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2fd634a5e307fc21ea7d05ab7c7fe9689f14fe25
clang-p2996/llvm/test/CodeGen
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Paulo Matos 2fd634a5e3 [WebAssembly] Implement table instruction intrinsics 
This change implements intrinsics for table.grow, table.fill,
table.size, and table.copy.

Differential Revision: https://reviews.llvm.org/D113420
2021-12-07 13:25:59 +01:00
..
AArch64
[AArch64][SVE] Fix fptrunc store for fixed len vector
2021-12-07 12:22:07 +00:00
AMDGPU
[GlobalISel] Allow DBG_VALUE to use undefined vregs before LiveDebugValues.
2021-12-05 15:55:59 -05:00
ARC
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ARM
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
AVR
[asm] Remove explicit branch for modifier 'l'
2021-11-19 09:19:53 -05:00
BPF
BPF: Workaround InstCombine trunc+icmp => mask+icmp Optimization
2021-11-18 20:25:28 -08:00
CSKY
[CSKY] Add compressed instruction mapping between 32-bit and 16-bit instruction
2021-12-06 14:04:54 +08:00
Generic
[GlobalISel] Allow DBG_VALUE to use undefined vregs before LiveDebugValues.
2021-12-05 15:55:59 -05:00
Hexagon
[NFC][llvm][Hexagon] Inclusive Terms remove uses of sanity in Hexagon taget
2021-11-22 10:08:01 -05:00
Inputs
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Lanai
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M68k
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Mips
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MIR
AMDGPU: Enable fixed function ABI by default
2021-12-04 10:49:18 -05:00
MSP430
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NVPTX
[NVPTX] Add imm variants for surface and texture instructions
2021-11-10 19:05:03 +03:00
PowerPC
[PowerPC][NFC] add cases for D114062
2021-12-07 01:12:01 +00:00
RISCV
[RISCV] Loosen some restrictions on lowering constant BUILD_VECTORs using vid.v.
2021-12-06 09:34:40 -08:00
SPARC
[SPARC] Zero-extend the operands when doing UMULO on 64-bit integers
2021-11-14 19:59:52 +01:00
SystemZ
[SystemZ] Improve codegen for memset.
2021-12-06 12:10:58 -06:00
Thumb
[clang][ARM] PACBTI-M assembly support
2021-11-30 09:28:18 +00:00
Thumb2
[ARM] Implement PAC return address signing mechanism for PACBTI-M
2021-12-07 10:15:19 +00:00
VE
[VE][NFC] Use POSIX-compatible stream redirection
2021-12-01 17:28:57 +01:00
WebAssembly
[WebAssembly] Implement table instruction intrinsics
2021-12-07 13:25:59 +01:00
WinCFGuard
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WinEH
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X86
[X86] Add test where block placement separates call from RV marker.
2021-12-07 10:52:54 +00:00
XCore
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