Simon Pilgrim 34dc4f24f2 Revert rG939291041bb35b8088e3b61be2b8b3bc950f64a7 "[AMDGPU] Regenerate wave32.ll test checks" ...

This still breaks buildbots

2021-07-25 15:59:26 +01:00

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AArch64

[AArch64][GlobalISel] Widen non-pow-2 types for shifts before clamping.

2021-07-24 15:50:43 -07:00

AMDGPU

Revert rG939291041bb35b8088e3b61be2b8b3bc950f64a7 "[AMDGPU] Regenerate wave32.ll test checks"

2021-07-25 15:59:26 +01:00

ARC

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ARM

ARM: don't return by popping PC if we have to adjust the stack afterwards.

2021-07-21 09:35:14 +01:00

AVR

[AVR] Only support sp, r0 and r1 in llvm.read_register

2021-07-24 14:03:27 +02:00

BPF

[BPF] Use elementtype attribute for preserve.array/struct.index intrinsics

2021-07-17 11:09:18 +02:00

Generic

[llc] Default MCUseDwarfDirectory to true

2021-07-12 17:44:02 -07:00

Hexagon

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Inputs

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Lanai

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M68k

[M68k][GloballSel] LegalizerInfo implementation

2021-07-15 13:00:43 -06:00

Mips

[llvm][sve] Lowering for VLS truncating stores

2021-07-23 14:04:55 +01:00

MIR

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MSP430

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NVPTX

[NVPTX] Add select(cc,binop(),binop()) fast-math tests

2021-07-18 15:30:24 +01:00

PowerPC

[PowerPC] Implement XL compatible behavior of __compare_and_swap

2021-07-23 01:16:02 +00:00

RISCV

[RISCV] Custom lower (i32 (fptoui/fptosi X)).

2021-07-24 10:50:43 -07:00

SPARC

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SystemZ

[SystemZ] Handle NoRegister in SystemZTargetLowering::emitMemMemWrapper().

2021-07-19 20:04:44 +02:00

Thumb

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Thumb2

[ARM] Extend more reductions during lowering

2021-07-19 08:58:03 +01:00

VE

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WebAssembly

[WebAssembly] Codegen for pmin and pmax

2021-07-23 14:49:21 -07:00

WinCFGuard

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WinEH

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X86

[NFC][Codegen][X86] Improve test coverage for repeated insertions of the same scalar into different elements

2021-07-25 17:37:04 +03:00

XCore

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