362142c4bb
This adds a check that all ExtensionWithMArch which are marked as implied features for an architecture are also present in the list of default features. It doesn't make sense to have something mandatory but not on by default. There were a number of existing cases that violated this rule, and some changes to which features are mandatory (indicated by the Implies field). This resulted in a bug where if a feature was marked as `Implies` but was not added to `DefaultExt`, then for `-march=base_arch+nofeat` the Driver would consider `feat` to have never been added and therefore would do nothing to disable it (no `-target-feature -feat` would be added, but the backend would enable the feature by default because of `Implies`). See clang/test/Driver/aarch64-negative-modifiers-for-default-features.c. Note that the processor definitions do not respect the architecture DefaultExts. These apply only when specifying `-march=<some architecture version>`. So when a feature is moved from `Implies` to `DefaultExts` on the Architecture definition, the feature needs to be added to all processor definitions (that are based on that architecture) in order to preserve the existing behaviour. I have checked the TRMs for many cases (see specific commit messages) but in other cases I have just kept the current behaviour and not tried to fix it.
344 lines
13 KiB
C++
344 lines
13 KiB
C++
//===- ARMTargetDefEmitter.cpp - Generate data about ARM Architectures ----===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This tablegen backend exports information about CPUs, FPUs, architectures,
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// and features into a common format that can be used by both TargetParser and
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// the ARM and AArch64 backends.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/StringSet.h"
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#include "llvm/Support/Format.h"
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#include "llvm/Support/FormatVariadic.h"
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#include "llvm/TableGen/Error.h"
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#include "llvm/TableGen/Record.h"
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#include "llvm/TableGen/TableGenBackend.h"
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#include <cstdint>
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#include <set>
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#include <string>
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using namespace llvm;
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/// Collect the full set of implied features for a SubtargetFeature.
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static void CollectImpliedFeatures(std::set<Record *> &SeenFeats, Record *Rec) {
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assert(Rec->isSubClassOf("SubtargetFeature") &&
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"Rec is not a SubtargetFeature");
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SeenFeats.insert(Rec);
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for (Record *Implied : Rec->getValueAsListOfDefs("Implies"))
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CollectImpliedFeatures(SeenFeats, Implied);
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}
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static void CheckFeatureTree(Record *Root) {
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std::set<Record *> SeenFeats;
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CollectImpliedFeatures(SeenFeats, Root);
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// Check that each of the mandatory (implied) features which is an
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// ExtensionWithMArch is also enabled by default.
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auto DefaultExtsVec = Root->getValueAsListOfDefs("DefaultExts");
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std::set<Record *> DefaultExts{DefaultExtsVec.begin(), DefaultExtsVec.end()};
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for (auto *Feat : SeenFeats) {
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if (Feat->isSubClassOf("ExtensionWithMArch") && !DefaultExts.count(Feat))
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PrintFatalError(Root->getLoc(),
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"ExtensionWithMArch " + Feat->getName() +
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" is implied (mandatory) as a SubtargetFeature, but "
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"is not present in DefaultExts");
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}
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}
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static void EmitARMTargetDef(RecordKeeper &RK, raw_ostream &OS) {
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OS << "// Autogenerated by ARMTargetDefEmitter.cpp\n\n";
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// Look through all SubtargetFeature defs with the given FieldName, and
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// collect the set of all Values that that FieldName is set to.
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auto gatherSubtargetFeatureFieldValues = [&RK](StringRef FieldName) {
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llvm::StringSet<> Set;
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for (const Record *Rec : RK.getAllDerivedDefinitions("SubtargetFeature")) {
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if (Rec->getValueAsString("FieldName") == FieldName) {
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Set.insert(Rec->getValueAsString("Value"));
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}
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}
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return Set;
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};
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// Sort the extensions alphabetically, so they don't appear in tablegen order.
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std::vector<Record *> SortedExtensions =
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RK.getAllDerivedDefinitions("Extension");
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auto Alphabetical = [](Record *A, Record *B) -> bool {
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const auto NameA = A->getValueAsString("Name");
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const auto NameB = B->getValueAsString("Name");
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return NameA.compare(NameB) < 0; // A lexographically less than B
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};
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std::sort(SortedExtensions.begin(), SortedExtensions.end(), Alphabetical);
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// The ARMProcFamilyEnum values are initialised by SubtargetFeature defs
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// which set the ARMProcFamily field. We can generate the enum from these defs
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// which look like this:
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//
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// def ProcA5 : SubtargetFeature<"a5", "ARMProcFamily", "CortexA5",
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// "Cortex-A5 ARM processors", []>;
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OS << "#ifndef ARM_PROCESSOR_FAMILY\n"
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<< "#define ARM_PROCESSOR_FAMILY(ENUM)\n"
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<< "#endif\n\n";
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const StringSet<> ARMProcFamilyVals =
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gatherSubtargetFeatureFieldValues("ARMProcFamily");
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for (const StringRef &Family : ARMProcFamilyVals.keys())
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OS << "ARM_PROCESSOR_FAMILY(" << Family << ")\n";
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OS << "\n#undef ARM_PROCESSOR_FAMILY\n\n";
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OS << "#ifndef ARM_ARCHITECTURE\n"
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<< "#define ARM_ARCHITECTURE(ENUM)\n"
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<< "#endif\n\n";
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// This should correspond to instances of the Architecture tablegen class.
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const StringSet<> ARMArchVals = gatherSubtargetFeatureFieldValues("ARMArch");
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for (const StringRef &Arch : ARMArchVals.keys())
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OS << "ARM_ARCHITECTURE(" << Arch << ")\n";
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OS << "\n#undef ARM_ARCHITECTURE\n\n";
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// Currently only AArch64 (not ARM) is handled beyond this point.
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if (!RK.getClass("Architecture64"))
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return;
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// Emit the ArchExtKind enum
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OS << "#ifdef EMIT_ARCHEXTKIND_ENUM\n"
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<< "enum ArchExtKind : unsigned {\n";
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for (const Record *Rec : SortedExtensions) {
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auto AEK = Rec->getValueAsString("ArchExtKindSpelling").upper();
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OS << " " << AEK << ",\n";
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}
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OS << " AEK_NUM_EXTENSIONS\n"
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<< "};\n"
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<< "#undef EMIT_ARCHEXTKIND_ENUM\n"
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<< "#endif // EMIT_ARCHEXTKIND_ENUM\n";
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// Emit information for each defined Extension; used to build ArmExtKind.
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OS << "#ifdef EMIT_EXTENSIONS\n"
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<< "inline constexpr ExtensionInfo Extensions[] = {\n";
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for (const Record *Rec : SortedExtensions) {
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auto AEK = Rec->getValueAsString("ArchExtKindSpelling").upper();
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OS << " ";
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OS << "{\"" << Rec->getValueAsString("UserVisibleName") << "\"";
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if (auto Alias = Rec->getValueAsString("UserVisibleAlias"); Alias.empty())
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OS << ", {}";
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else
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OS << ", \"" << Alias << "\"";
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OS << ", AArch64::" << AEK;
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OS << ", \"" << Rec->getValueAsString("ArchFeatureName") << "\"";
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OS << ", \"" << Rec->getValueAsString("Desc") << "\"";
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OS << ", \"+" << Rec->getValueAsString("Name") << "\""; // posfeature
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OS << ", \"-" << Rec->getValueAsString("Name") << "\""; // negfeature
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OS << "},\n";
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};
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OS << "};\n"
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<< "#undef EMIT_EXTENSIONS\n"
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<< "#endif // EMIT_EXTENSIONS\n"
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<< "\n";
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// Emit FMV information
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auto FMVExts = RK.getAllDerivedDefinitionsIfDefined("FMVExtension");
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OS << "#ifdef EMIT_FMV_INFO\n"
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<< "const std::vector<llvm::AArch64::FMVInfo>& "
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"llvm::AArch64::getFMVInfo() {\n"
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<< " static std::vector<FMVInfo> I;\n"
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<< " if(I.size()) return I;\n"
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<< " I.reserve(" << FMVExts.size() << ");\n";
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for (const Record *Rec : FMVExts) {
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OS << " I.emplace_back(";
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OS << "\"" << Rec->getValueAsString("Name") << "\"";
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OS << ", " << Rec->getValueAsString("Bit");
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OS << ", \"" << Rec->getValueAsString("BackendFeatures") << "\"";
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OS << ", " << (uint64_t)Rec->getValueAsInt("Priority");
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OS << ");\n";
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};
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OS << " return I;\n"
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<< "}\n"
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<< "#undef EMIT_FMV_INFO\n"
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<< "#endif // EMIT_FMV_INFO\n"
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<< "\n";
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// Emit extension dependencies
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OS << "#ifdef EMIT_EXTENSION_DEPENDENCIES\n"
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<< "inline constexpr ExtensionDependency ExtensionDependencies[] = {\n";
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for (const Record *Rec : SortedExtensions) {
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auto LaterAEK = Rec->getValueAsString("ArchExtKindSpelling").upper();
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for (const Record *I : Rec->getValueAsListOfDefs("Implies"))
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if (auto EarlierAEK = I->getValueAsOptionalString("ArchExtKindSpelling"))
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OS << " {" << EarlierAEK->upper() << ", " << LaterAEK << "},\n";
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}
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// FIXME: Tablegen has the Subtarget Feature FeatureRCPC_IMMO which is implied
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// by FeatureRCPC3 and in turn implies FeatureRCPC. The proper fix is to make
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// FeatureRCPC_IMMO an Extension but that will expose it to the command line.
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OS << " {AEK_RCPC, AEK_RCPC3},\n";
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OS << "};\n"
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<< "#undef EMIT_EXTENSION_DEPENDENCIES\n"
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<< "#endif // EMIT_EXTENSION_DEPENDENCIES\n"
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<< "\n";
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// Emit architecture information
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OS << "#ifdef EMIT_ARCHITECTURES\n";
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// Return the C++ name of the of an ArchInfo object
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auto ArchInfoName = [](int Major, int Minor,
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StringRef Profile) -> std::string {
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return Minor == 0 ? "ARMV" + std::to_string(Major) + Profile.upper()
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: "ARMV" + std::to_string(Major) + "_" +
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std::to_string(Minor) + Profile.upper();
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};
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auto Architectures = RK.getAllDerivedDefinitionsIfDefined("Architecture64");
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std::vector<std::string> CppSpellings;
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for (const Record *Rec : Architectures) {
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const int Major = Rec->getValueAsInt("Major");
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const int Minor = Rec->getValueAsInt("Minor");
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const std::string ProfileLower = Rec->getValueAsString("Profile").str();
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const std::string ProfileUpper = Rec->getValueAsString("Profile").upper();
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if (ProfileLower != "a" && ProfileLower != "r")
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PrintFatalError(Rec->getLoc(),
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"error: Profile must be one of 'a' or 'r', got '" +
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ProfileLower + "'");
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// Name of the object in C++
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const std::string CppSpelling = ArchInfoName(Major, Minor, ProfileUpper);
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OS << "inline constexpr ArchInfo " << CppSpelling << " = {\n";
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CppSpellings.push_back(CppSpelling);
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OS << llvm::format(" VersionTuple{%d, %d},\n", Major, Minor);
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OS << llvm::format(" %sProfile,\n", ProfileUpper.c_str());
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// Name as spelled for -march.
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if (Minor == 0)
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OS << llvm::format(" \"armv%d-%s\",\n", Major, ProfileLower.c_str());
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else
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OS << llvm::format(" \"armv%d.%d-%s\",\n", Major, Minor,
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ProfileLower.c_str());
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// SubtargetFeature::Name, used for -target-feature. Here the "+" is added.
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const auto TargetFeatureName = Rec->getValueAsString("Name");
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OS << " \"+" << TargetFeatureName << "\",\n";
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// Construct the list of default extensions
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OS << " (AArch64::ExtensionBitset({";
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for (auto *E : Rec->getValueAsListOfDefs("DefaultExts")) {
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OS << "AArch64::" << E->getValueAsString("ArchExtKindSpelling").upper()
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<< ", ";
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}
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OS << "}))\n";
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OS << "};\n";
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}
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OS << "\n"
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<< "/// The set of all architectures\n"
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<< "static constexpr std::array<const ArchInfo *, " << CppSpellings.size()
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<< "> ArchInfos = {\n";
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for (StringRef CppSpelling : CppSpellings)
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OS << " &" << CppSpelling << ",\n";
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OS << "};\n";
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OS << "#undef EMIT_ARCHITECTURES\n"
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<< "#endif // EMIT_ARCHITECTURES\n"
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<< "\n";
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// Emit CPU Aliases
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OS << "#ifdef EMIT_CPU_ALIAS\n"
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<< "inline constexpr Alias CpuAliases[] = {\n";
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llvm::StringSet<> Processors;
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for (const Record *Rec : RK.getAllDerivedDefinitions("ProcessorModel"))
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Processors.insert(Rec->getValueAsString("Name"));
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llvm::StringSet<> Aliases;
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for (const Record *Rec : RK.getAllDerivedDefinitions("ProcessorAlias")) {
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auto Name = Rec->getValueAsString("Name");
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auto Alias = Rec->getValueAsString("Alias");
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if (!Processors.contains(Alias))
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PrintFatalError(
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Rec, "Alias '" + Name + "' references a non-existent ProcessorModel '" + Alias + "'");
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if (Processors.contains(Name))
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PrintFatalError(
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Rec, "Alias '" + Name + "' duplicates an existing ProcessorModel");
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if (!Aliases.insert(Name).second)
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PrintFatalError(
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Rec, "Alias '" + Name + "' duplicates an existing ProcessorAlias");
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OS << llvm::formatv(R"( { "{0}", "{1}" },)", Name, Alias) << '\n';
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}
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OS << "};\n"
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<< "#undef EMIT_CPU_ALIAS\n"
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<< "#endif // EMIT_CPU_ALIAS\n"
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<< "\n";
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// Emit CPU information
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OS << "#ifdef EMIT_CPU_INFO\n"
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<< "inline constexpr CpuInfo CpuInfos[] = {\n";
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for (const Record *Rec : RK.getAllDerivedDefinitions("ProcessorModel")) {
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auto Name = Rec->getValueAsString("Name");
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auto Features = Rec->getValueAsListOfDefs("Features");
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// "apple-latest" is backend-only, should not be accepted by TargetParser.
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if (Name == "apple-latest")
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continue;
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Record *Arch;
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if (Name == "generic") {
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// "generic" is an exception. It does not have an architecture, and there
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// are tests that depend on e.g. -mattr=-v8.4a meaning HasV8_0aOps==false.
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// However, in TargetParser CPUInfo, it is written as 8.0-A.
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Arch = RK.getDef("HasV8_0aOps");
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} else {
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// Search for an Architecture64 in the list of features.
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auto IsArch = [](Record *F) { return F->isSubClassOf("Architecture64"); };
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auto ArchIter = llvm::find_if(Features, IsArch);
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if (ArchIter == Features.end())
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PrintFatalError(Rec, "Features must include an Architecture64.");
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Arch = *ArchIter;
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// Check there is only one Architecture in the list.
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if (llvm::count_if(Features, IsArch) > 1)
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PrintFatalError(Rec, "Features has multiple Architecture64 entries");
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}
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auto Major = Arch->getValueAsInt("Major");
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auto Minor = Arch->getValueAsInt("Minor");
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auto Profile = Arch->getValueAsString("Profile");
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auto ArchInfo = ArchInfoName(Major, Minor, Profile);
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CheckFeatureTree(Arch);
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OS << " {\n"
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<< " \"" << Name << "\",\n"
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<< " " << ArchInfo << ",\n"
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<< " AArch64::ExtensionBitset({\n";
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// Keep track of extensions we have seen
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StringSet<> SeenExts;
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for (auto *E : Rec->getValueAsListOfDefs("Features"))
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// Only process subclasses of Extension
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if (E->isSubClassOf("Extension")) {
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const auto AEK = E->getValueAsString("ArchExtKindSpelling").upper();
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if (!SeenExts.insert(AEK).second)
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PrintFatalError(Rec, "feature already added: " + E->getName());
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OS << " AArch64::" << AEK << ",\n";
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}
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OS << " })\n"
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<< " },\n";
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}
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OS << "};\n";
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OS << "#undef EMIT_CPU_INFO\n"
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<< "#endif // EMIT_CPU_INFO\n"
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<< "\n";
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}
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static TableGen::Emitter::Opt
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X("gen-arm-target-def", EmitARMTargetDef,
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"Generate the ARM or AArch64 Architecture information header.");
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