98a640a2fa
Follow-up to14951a5a31* Unify getVariantKindName and getVariantKindForName * Allow each target to specify the preferred case (albeit ignored in MCParser) Note: targets that use variant kinds should call MCExpr::print with a non-null MAI to print variant kinds. operator<< passes a nullptr to `MCExpr::print`, which should be avoided (e.g. Hexagon; fixed in commitcf00ac81ac).
85 lines
3.0 KiB
C++
85 lines
3.0 KiB
C++
//===-- MCTargetDesc/AMDGPUMCAsmInfo.cpp - Assembly Info ------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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/// \file
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//===----------------------------------------------------------------------===//
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#include "AMDGPUMCAsmInfo.h"
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#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/TargetParser/Triple.h"
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using namespace llvm;
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const MCAsmInfo::VariantKindDesc variantKindDescs[] = {
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{MCSymbolRefExpr::VK_GOTPCREL, "gotpcrel"},
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{MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_LO, "gotpcrel32@lo"},
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{MCSymbolRefExpr::VK_AMDGPU_GOTPCREL32_HI, "gotpcrel32@hi"},
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{MCSymbolRefExpr::VK_AMDGPU_REL32_LO, "rel32@lo"},
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{MCSymbolRefExpr::VK_AMDGPU_REL32_HI, "rel32@hi"},
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{MCSymbolRefExpr::VK_AMDGPU_REL64, "rel64"},
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{MCSymbolRefExpr::VK_AMDGPU_ABS32_LO, "abs32@lo"},
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{MCSymbolRefExpr::VK_AMDGPU_ABS32_HI, "abs32@hi"},
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};
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AMDGPUMCAsmInfo::AMDGPUMCAsmInfo(const Triple &TT,
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const MCTargetOptions &Options) {
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CodePointerSize = (TT.getArch() == Triple::amdgcn) ? 8 : 4;
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StackGrowsUp = true;
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HasSingleParameterDotFile = false;
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//===------------------------------------------------------------------===//
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MinInstAlignment = 4;
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// This is the maximum instruction encoded size for gfx10. With a known
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// subtarget, it can be reduced to 8 bytes.
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MaxInstLength = (TT.getArch() == Triple::amdgcn) ? 20 : 16;
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SeparatorString = "\n";
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CommentString = ";";
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InlineAsmStart = ";#ASMSTART";
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InlineAsmEnd = ";#ASMEND";
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//===--- Data Emission Directives -------------------------------------===//
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UsesELFSectionDirectiveForBSS = true;
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//===--- Global Variable Emission Directives --------------------------===//
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COMMDirectiveAlignmentIsInBytes = false;
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HasNoDeadStrip = true;
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//===--- Dwarf Emission Directives -----------------------------------===//
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SupportsDebugInformation = true;
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UsesCFIWithoutEH = true;
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DwarfRegNumForCFI = true;
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UseIntegratedAssembler = false;
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initializeVariantKinds(variantKindDescs);
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}
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bool AMDGPUMCAsmInfo::shouldOmitSectionDirective(StringRef SectionName) const {
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return SectionName == ".hsatext" || SectionName == ".hsadata_global_agent" ||
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SectionName == ".hsadata_global_program" ||
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SectionName == ".hsarodata_readonly_agent" ||
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MCAsmInfo::shouldOmitSectionDirective(SectionName);
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}
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unsigned AMDGPUMCAsmInfo::getMaxInstLength(const MCSubtargetInfo *STI) const {
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if (!STI || STI->getTargetTriple().getArch() == Triple::r600)
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return MaxInstLength;
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// Maximum for NSA encoded images
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if (STI->hasFeature(AMDGPU::FeatureNSAEncoding))
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return 20;
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// VOP3PX encoding.
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if (STI->hasFeature(AMDGPU::FeatureGFX950Insts))
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return 16;
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// 64-bit instruction with 32-bit literal.
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if (STI->hasFeature(AMDGPU::FeatureVOP3Literal))
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return 12;
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return 8;
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}
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