Fangrui Song 9beb467d92 MC: Store fragment content and fixups out-of-line ...

Moved `Contents` and `Fixups` SmallVector storage to MCSection, enabling
trivial destructors for most fragment subclasses and eliminating the need
for MCFragment::destroy in ~MCSection.

For appending content to the current section, use
getContentsForAppending. During assembler relaxation, prefer
setContents/setFixups, which may involve copying and reduce the benefits
of https://reviews.llvm.org/D145791.

Moving only Contents out-of-line caused a slight performance regression
(Alexis Engelke's 2024 prototype). By also moving Fragments out-of-line,
fragment destructors become trivial, resulting in
neglgible instructions:u increase for "stage2-O0-g" and [large max-rss decrease](https://llvm-compile-time-tracker.com/compare.php?from=84e82746c3ff63ec23a8b85e9efd4f7fccf92590&to=555a28c0b2f8250a9cf86fd267a04b0460283e15&stat=max-rss&linkStats=on)
for the "stage1-ReleaseLTO-g (link only)" benchmark.
(
An older version using fewer inline functions: https://llvm-compile-time-tracker.com/compare.php?from=bb982e733cfcda7e4cfb0583544f68af65211ed1&to=f12d55f97c47717d438951ecddecf8ebd28c296b&linkStats=on
)

Now using plain SmallVector in MCSection for storage, with potential for
future allocator optimizations, such as allocating `Contents` as the
trailing object of MCDataFragment. (GNU Assembler uses gnulib's obstack
for fragment management.)

Co-authored-by: Alexis Engelke <engelke@in.tum.de>

Pull Request: https://github.com/llvm/llvm-project/pull/146307

2025-07-01 00:21:12 -07:00

..

AsmParser

MCExpr: Migrate away from operator<<

2025-06-28 14:41:58 -07:00

Disassembler

[llvm] annotate interfaces in llvm/Target for DLL export (#143615)

2025-06-17 13:28:45 -07:00

MCTargetDesc

MC: Store fragment content and fixups out-of-line

2025-07-01 00:21:12 -07:00

TargetInfo

[llvm] annotate interfaces in llvm/Target for DLL export (#143615)

2025-06-17 13:28:45 -07:00

CMakeLists.txt

…

LoongArch.h

[LoongArch] Pass OptLevel to LoongArchDAGToDAGISel correctly

2025-06-07 15:33:58 +08:00

LoongArch.td

[NFC][Options] Add same-address constraint to the description of '-m[no]ld-seq-sa' (#141192)

2025-05-26 10:53:17 +08:00

LoongArchAsmPrinter.cpp

[llvm] annotate interfaces in llvm/Target for DLL export (#143615)

2025-06-17 13:28:45 -07:00

LoongArchAsmPrinter.h

Register assembly printer passes (#138348)

2025-05-06 18:01:17 -07:00

LoongArchCallingConv.td

…

LoongArchDeadRegisterDefinitions.cpp

…

LoongArchExpandAtomicPseudoInsts.cpp

[LoongArch] Add codegen support for atomic-ops on LA32 (#141557)

2025-06-06 16:00:59 +08:00

LoongArchExpandPseudoInsts.cpp

[LoongArch] Fix assertion failure for annotate tablejump (#140907)

2025-05-22 18:50:40 +08:00

LoongArchFloat32InstrInfo.td

LoongArch: Set FMAXNUM and FMINNUM as Legal (#139010)

2025-05-09 16:26:08 +08:00

LoongArchFloat64InstrInfo.td

[LoongArch] Add codegen support for ILP32D calling convention (#141539)

2025-06-25 21:00:29 +08:00

LoongArchFloatInstrFormats.td

…

LoongArchFrameLowering.cpp

…

LoongArchFrameLowering.h

…

LoongArchInstrFormats.td

…

LoongArchInstrInfo.cpp

…

LoongArchInstrInfo.h

…

LoongArchInstrInfo.td

[LoongArch] Add codegen support for ILP32D calling convention (#141539)

2025-06-25 21:00:29 +08:00

LoongArchISelDAGToDAG.cpp

[LoongArch] Pass OptLevel to LoongArchDAGToDAGISel correctly

2025-06-07 15:33:58 +08:00

LoongArchISelDAGToDAG.h

[LoongArch] Pass OptLevel to LoongArchDAGToDAGISel correctly

2025-06-07 15:33:58 +08:00

LoongArchISelLowering.cpp

[LoongArch] Fix xvshuf instructions lowering (#145868)

2025-06-27 10:29:32 +08:00

LoongArchISelLowering.h

[LoongArch] Add codegen support for ILP32D calling convention (#141539)

2025-06-25 21:00:29 +08:00

LoongArchLASXInstrFormats.td

…

LoongArchLASXInstrInfo.td

[LoongArch] Lower vector select mask generation to [X]VMSK{LT,GE,NE}Z if possible (#142109)

2025-06-05 22:17:38 +08:00

LoongArchLBTInstrFormats.td

…

LoongArchLBTInstrInfo.td

…

LoongArchLSXInstrFormats.td

…

LoongArchLSXInstrInfo.td

[LoongArch] Lower vector select mask generation to [X]VMSK{LT,GE,NE}Z if possible (#142109)

2025-06-05 22:17:38 +08:00

LoongArchLVZInstrInfo.td

[LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (#140862)

2025-05-22 18:49:27 +08:00

LoongArchMachineFunctionInfo.h

[LoongArch] Fix assertion failure for annotate tablejump (#140907)

2025-05-22 18:50:40 +08:00

LoongArchMCInstLower.cpp

LoongArch: Move MCExpr into MCAsmInfo

2025-06-26 20:42:51 -07:00

LoongArchMergeBaseOffset.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

LoongArchOptWInstrs.cpp

…

LoongArchRegisterInfo.cpp

[LoongArch] Add patterns for vstelm instructions (#139201)

2025-05-21 14:21:12 +08:00

LoongArchRegisterInfo.h

…

LoongArchRegisterInfo.td

[LoongArch] Prevent R0/R1 allocation for rj operand of [G]CSRXCHG (#140862)

2025-05-22 18:49:27 +08:00

LoongArchSubtarget.cpp

…

LoongArchSubtarget.h

…

LoongArchTargetMachine.cpp

[llvm] annotate interfaces in llvm/Target for DLL export (#143615)

2025-06-17 13:28:45 -07:00

LoongArchTargetMachine.h

…

LoongArchTargetTransformInfo.cpp

[TTI] Make all interface methods const (NFCI) (#136598)

2025-04-22 06:27:29 +03:00

LoongArchTargetTransformInfo.h

[TTI] Simplify implementation (NFCI) (#136674)

2025-04-26 15:25:40 +03:00