Files
clang-p2996/llvm/test/MC/AArch64/align-code.s
Florin Popa 301fe47971 [AArch64][ELF] Section alignment of 4 for AArch64 instruction (#114031)
The integrated assembler sets a minimum alignment for the .text section
of 4. However user defined sections get an alignment of 1. Unlike the
GNU assembler which raises the section alignment to 4 if an AArch64
instruction is used, the integrated assembler leaves the alignment at 1

---------

Co-authored-by: Florin Popa <florin.popa@arm.com>
2025-02-24 09:17:04 +00:00

32 lines
611 B
ArmAsm

// RUN: llvm-mc -triple=aarch64 -filetype=obj -o %t.o %s
// RUN: llvm-readobj -S --sd %t.o | FileCheck %s
.section sec00, "ax"
.byte 1
.section sec01, "ax"
nop
nop
.section sec02, "ax"
.balign 4
nop
nop
.section sec03, "ax"
.balign 8
nop
nop
.section sec04, "ax"
.byte 0
.section sec05, "aw"
nop
nop
// CHECK: Name: sec00
// CHECK: AddressAlignment: 4
// CHECK: Name: sec01
// CHECK: AddressAlignment: 4
// CHECK: Name: sec02
// CHECK: AddressAlignment: 4
// CHECK: Name: sec03
// CHECK: AddressAlignment: 8
// CHECK: Name: sec04
// CHECK: AddressAlignment: 4
// CHECK: Name: sec05
// CHECK: AddressAlignment: 1