Implment base support of the TLS functionality using Xtensa THREADPTR Option. Implement basic functionality of the DFPAccel Option(registers support).
12 lines
627 B
Plaintext
12 lines
627 B
Plaintext
# NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --version 5
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# RUN: llvm-mc -triple=xtensa -mattr=+threadptr -disassemble %s | FileCheck -check-prefixes=CHECK-THREADPTR %s
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# RUN: not llvm-mc -triple=xtensa -disassemble %s 2>&1 | FileCheck --implicit-check-not=warning: -check-prefixes=CHECK-CORE %s
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## Verify that binary code is correctly disassembled with
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## THREADPTR option enabled. Also verify that dissasembling without
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## THREADPTR option generates warnings.
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[0x70,0x3e,0xe3]
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# CHECK-THREADPTR: rur a3, threadptr
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# CHECK-CORE: :[[@LINE-2]]:2: warning: invalid instruction encoding
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