a1d43c14d8
This is the second attempt at merging #91800, which bounced due to a linker error apparently caused by an undeclared dependency. `MLIRVectorToSPIRV` needed to depend on `MLIRVectorTransforms`. In fact that was a preexisting issue already flagged by the tool in https://discourse.llvm.org/t/ninja-can-now-check-for-missing-cmake-dependencies-on-generated-files/74344. Context: https://github.com/iree-org/iree/issues/17346. Test IREE integrate showing it's fixing the problem it's intended to fix, i.e. it allows IREE to drop its local revert of https://github.com/llvm/llvm-project/pull/89131: https://github.com/iree-org/iree/pull/17359 This is added to VectorToSPIRV because SPIRV doesn't currently handle `vector.interleave` (see motivating context above). This is limited to 1D, non-scalable vectors.
127 lines
4.5 KiB
C++
127 lines
4.5 KiB
C++
//===- LowerVectorInterleave.cpp - Lower 'vector.interleave' operation ----===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements target-independent rewrites and utilities to lower the
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// 'vector.interleave' operation.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/Vector/IR/VectorOps.h"
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#include "mlir/Dialect/Vector/Transforms/LoweringPatterns.h"
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#include "mlir/Dialect/Vector/Utils/VectorUtils.h"
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#include "mlir/IR/BuiltinTypes.h"
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#include "mlir/IR/PatternMatch.h"
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#include "mlir/Support/LogicalResult.h"
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#define DEBUG_TYPE "vector-interleave-lowering"
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using namespace mlir;
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using namespace mlir::vector;
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namespace {
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/// A one-shot unrolling of vector.interleave to the `targetRank`.
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///
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/// Example:
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///
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/// ```mlir
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/// vector.interleave %a, %b : vector<1x2x3x4xi64>
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/// ```
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/// Would be unrolled to:
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/// ```mlir
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/// %result = arith.constant dense<0> : vector<1x2x3x8xi64>
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/// %0 = vector.extract %a[0, 0, 0] ─┐
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/// : vector<4xi64> from vector<1x2x3x4xi64> |
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/// %1 = vector.extract %b[0, 0, 0] |
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/// : vector<4xi64> from vector<1x2x3x4xi64> | - Repeated 6x for
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/// %2 = vector.interleave %0, %1 : vector<4xi64> | all leading positions
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/// %3 = vector.insert %2, %result [0, 0, 0] |
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/// : vector<8xi64> into vector<1x2x3x8xi64> ┘
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/// ```
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///
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/// Note: If any leading dimension before the `targetRank` is scalable the
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/// unrolling will stop before the scalable dimension.
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class UnrollInterleaveOp : public OpRewritePattern<vector::InterleaveOp> {
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public:
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UnrollInterleaveOp(int64_t targetRank, MLIRContext *context,
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PatternBenefit benefit = 1)
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: OpRewritePattern(context, benefit), targetRank(targetRank){};
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LogicalResult matchAndRewrite(vector::InterleaveOp op,
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PatternRewriter &rewriter) const override {
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VectorType resultType = op.getResultVectorType();
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auto unrollIterator = vector::createUnrollIterator(resultType, targetRank);
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if (!unrollIterator)
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return failure();
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auto loc = op.getLoc();
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Value result = rewriter.create<arith::ConstantOp>(
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loc, resultType, rewriter.getZeroAttr(resultType));
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for (auto position : *unrollIterator) {
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Value extractLhs = rewriter.create<ExtractOp>(loc, op.getLhs(), position);
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Value extractRhs = rewriter.create<ExtractOp>(loc, op.getRhs(), position);
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Value interleave =
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rewriter.create<InterleaveOp>(loc, extractLhs, extractRhs);
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result = rewriter.create<InsertOp>(loc, interleave, result, position);
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}
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rewriter.replaceOp(op, result);
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return success();
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}
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private:
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int64_t targetRank = 1;
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};
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/// Rewrite vector.interleave op into an equivalent vector.shuffle op, when
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/// applicable: `sourceType` must be 1D and non-scalable.
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///
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/// Example:
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///
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/// ```mlir
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/// vector.interleave %a, %b : vector<7xi16>
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/// ```
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///
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/// Is rewritten into:
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///
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/// ```mlir
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/// vector.shuffle %arg0, %arg1 [0, 7, 1, 8, 2, 9, 3, 10, 4, 11, 5, 12, 6, 13]
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/// : vector<7xi16>, vector<7xi16>
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/// ```
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class InterleaveToShuffle : public OpRewritePattern<vector::InterleaveOp> {
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public:
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InterleaveToShuffle(MLIRContext *context, PatternBenefit benefit = 1)
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: OpRewritePattern(context, benefit) {};
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LogicalResult matchAndRewrite(vector::InterleaveOp op,
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PatternRewriter &rewriter) const override {
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VectorType sourceType = op.getSourceVectorType();
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if (sourceType.getRank() != 1 || sourceType.isScalable()) {
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return failure();
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}
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int64_t n = sourceType.getNumElements();
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auto seq = llvm::seq<int64_t>(2 * n);
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auto zip = llvm::to_vector(llvm::map_range(
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seq, [n](int64_t i) { return (i % 2 ? n : 0) + i / 2; }));
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rewriter.replaceOpWithNewOp<ShuffleOp>(op, op.getLhs(), op.getRhs(), zip);
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return success();
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}
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};
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} // namespace
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void mlir::vector::populateVectorInterleaveLoweringPatterns(
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RewritePatternSet &patterns, int64_t targetRank, PatternBenefit benefit) {
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patterns.add<UnrollInterleaveOp>(targetRank, patterns.getContext(), benefit);
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}
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void mlir::vector::populateVectorInterleaveToShufflePatterns(
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RewritePatternSet &patterns, PatternBenefit benefit) {
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patterns.add<InterleaveToShuffle>(patterns.getContext(), benefit);
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}
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