Matt Arsenault 7425af4b7a AMDGPU: Add pseudoinstruction for agpr or vgpr constants (#130042)

2025-03-07 09:18:22 +07:00

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fix-illegal-vector-copies.mir

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issue98474-missing-def-liveout-physical-subregister.mir

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lit.local.cfg

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register-killed-inside-loop.mir

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test_g_bitcast.mir

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test_g_incompatible_range.mir

MachineVerifier: Fix check for range type (#124894)

2025-01-30 10:56:12 +07:00

test_g_intrinsic_w_side_effects.mir

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test_g_intrinsic.mir

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undef-should-only-be-set-on-subreg-defs.mir

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undef-virt-reg-entry-block.mir

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undef-virt-reg-nonentry-block.mir

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unsupported-subreg-index-aligned-vgpr-check.mir

MachineVerifier: Print name of failing subregister index (#129491)

2025-03-04 11:25:34 +07:00

verifier-ec-subreg-liveness.mir

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verifier-implicit-virtreg-invalid-physreg-liveness.mir

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verifier-pseudo-terminators.mir

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verifier-sdwa-selection.mir

[AMDGPU] Verify SdwaSel value range (#128898)

2025-02-27 08:11:29 +01:00

verify-av-mov-imm-pseudo.mir

AMDGPU: Add pseudoinstruction for agpr or vgpr constants (#130042)

2025-03-07 09:18:22 +07:00

verify-implicit-def.mir

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verify-reg-sequence.mir

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writelane_m0.mir

[AMDGPU][NFC] Replace gfx940 and gfx941 with gfx942 in llvm/test (#125711)

2025-02-13 15:17:12 +01:00