6b75a3523f
This includes .seh_* directives for generating it from assembly.
It is designed fairly similarly to the ARM64 handling.
For .seh_handler directives, such as
".seh_handler __C_specific_handler, @except" (which is supported
on x86_64 and aarch64 so far), the "@except" bit doesn't work in
ARM assembly, as '@' is used as a comment character (on all current
platforms).
Allow using '%' instead of '@' for this purpose. This convention
is used by GAS in similar contexts already,
e.g. [1]:
Note on targets where the @ character is the start of a comment
(eg ARM) then another character is used instead. For example the
ARM port uses the % character.
In practice, this unfortunately means that all such .seh_handler
directives will need ifdefs for ARM.
Contrary to ARM64, on ARM, it's quite common that we can't evaluate
e.g. the function length at this point, due to instructions whose
length is finalized later. (Also, inline jump tables end with
a ".p2align 1".)
If unable to to evaluate the function length immediately, emit
it as an MCExpr instead. If we'd implement splitting the unwind
info for a function (which isn't implemented for ARM64 yet either),
we wouldn't know whether we need to split it though.
Avoid calling getFrameIndexOffset() on an unset
FuncInfo.UnwindHelpFrameIdx, to avoid triggering asserts in the
preexisting testcase CodeGen/ARM/Windows/wineh-basic.ll. (Once
MSVC exception handling is fully implemented, those changes
can be reverted.)
[1] https://sourceware.org/binutils/docs/as/Section.html#Section
Differential Revision: https://reviews.llvm.org/D125645
122 lines
3.4 KiB
C++
122 lines
3.4 KiB
C++
//===-- ARMMCAsmInfo.cpp - ARM asm properties -----------------------------===//
|
|
//
|
|
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
|
// See https://llvm.org/LICENSE.txt for license information.
|
|
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file contains the declarations of the ARMMCAsmInfo properties.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#include "ARMMCAsmInfo.h"
|
|
#include "llvm/ADT/Triple.h"
|
|
|
|
using namespace llvm;
|
|
|
|
void ARMMCAsmInfoDarwin::anchor() { }
|
|
|
|
ARMMCAsmInfoDarwin::ARMMCAsmInfoDarwin(const Triple &TheTriple) {
|
|
if ((TheTriple.getArch() == Triple::armeb) ||
|
|
(TheTriple.getArch() == Triple::thumbeb))
|
|
IsLittleEndian = false;
|
|
|
|
Data64bitsDirective = nullptr;
|
|
CommentString = "@";
|
|
Code16Directive = ".code\t16";
|
|
Code32Directive = ".code\t32";
|
|
UseDataRegionDirectives = true;
|
|
|
|
SupportsDebugInformation = true;
|
|
|
|
// Conditional Thumb 4-byte instructions can have an implicit IT.
|
|
MaxInstLength = 6;
|
|
|
|
// Exceptions handling
|
|
ExceptionsType = (TheTriple.isOSDarwin() && !TheTriple.isWatchABI())
|
|
? ExceptionHandling::SjLj
|
|
: ExceptionHandling::DwarfCFI;
|
|
}
|
|
|
|
void ARMELFMCAsmInfo::anchor() { }
|
|
|
|
ARMELFMCAsmInfo::ARMELFMCAsmInfo(const Triple &TheTriple) {
|
|
if ((TheTriple.getArch() == Triple::armeb) ||
|
|
(TheTriple.getArch() == Triple::thumbeb))
|
|
IsLittleEndian = false;
|
|
|
|
// ".comm align is in bytes but .align is pow-2."
|
|
AlignmentIsInBytes = false;
|
|
|
|
Data64bitsDirective = nullptr;
|
|
CommentString = "@";
|
|
Code16Directive = ".code\t16";
|
|
Code32Directive = ".code\t32";
|
|
|
|
SupportsDebugInformation = true;
|
|
|
|
// Conditional Thumb 4-byte instructions can have an implicit IT.
|
|
MaxInstLength = 6;
|
|
|
|
// Exceptions handling
|
|
switch (TheTriple.getOS()) {
|
|
case Triple::NetBSD:
|
|
ExceptionsType = ExceptionHandling::DwarfCFI;
|
|
break;
|
|
default:
|
|
ExceptionsType = ExceptionHandling::ARM;
|
|
break;
|
|
}
|
|
|
|
// foo(plt) instead of foo@plt
|
|
UseParensForSymbolVariant = true;
|
|
}
|
|
|
|
void ARMELFMCAsmInfo::setUseIntegratedAssembler(bool Value) {
|
|
UseIntegratedAssembler = Value;
|
|
if (!UseIntegratedAssembler) {
|
|
// gas doesn't handle VFP register names in cfi directives,
|
|
// so don't use register names with external assembler.
|
|
// See https://sourceware.org/bugzilla/show_bug.cgi?id=16694
|
|
DwarfRegNumForCFI = true;
|
|
}
|
|
}
|
|
|
|
void ARMCOFFMCAsmInfoMicrosoft::anchor() { }
|
|
|
|
ARMCOFFMCAsmInfoMicrosoft::ARMCOFFMCAsmInfoMicrosoft() {
|
|
AlignmentIsInBytes = false;
|
|
SupportsDebugInformation = true;
|
|
ExceptionsType = ExceptionHandling::WinEH;
|
|
WinEHEncodingType = WinEH::EncodingType::Itanium;
|
|
PrivateGlobalPrefix = "$M";
|
|
PrivateLabelPrefix = "$M";
|
|
CommentString = "@";
|
|
|
|
// Conditional Thumb 4-byte instructions can have an implicit IT.
|
|
MaxInstLength = 6;
|
|
}
|
|
|
|
void ARMCOFFMCAsmInfoGNU::anchor() { }
|
|
|
|
ARMCOFFMCAsmInfoGNU::ARMCOFFMCAsmInfoGNU() {
|
|
AlignmentIsInBytes = false;
|
|
HasSingleParameterDotFile = true;
|
|
|
|
CommentString = "@";
|
|
Code16Directive = ".code\t16";
|
|
Code32Directive = ".code\t32";
|
|
PrivateGlobalPrefix = ".L";
|
|
PrivateLabelPrefix = ".L";
|
|
|
|
SupportsDebugInformation = true;
|
|
ExceptionsType = ExceptionHandling::DwarfCFI;
|
|
UseParensForSymbolVariant = true;
|
|
|
|
DwarfRegNumForCFI = false;
|
|
|
|
// Conditional Thumb 4-byte instructions can have an implicit IT.
|
|
MaxInstLength = 6;
|
|
}
|