cb8681a2b3
This patch addresses several alignment issues in the stack frame when
RVV objects are taken into account.
One bug is that the RVV stack was never guaranteed to keep the alignment
of the stack *as a whole*. We must maintain a 16-byte aligned stack at
all times, especially when calling other functions. With the standard V
extension, this is conveniently happening since VLEN is at least 128 and
always 16-byte aligned. However, we support Zvl64b which does not
guarantee this. To fix this, the RVV stack size is rounded up to be
aligned to 16 bytes. This in practice generally makes us allocate a
stack sized at least 2*VLEN in size, and a multiple of 2.
|------------------------------| -- <-- FP
| 8-byte callee-save | | |
|------------------------------| | |
| one VLENB-sized RVV object | | |
|------------------------------| | |
| 8-byte local variable | | |
|------------------------------| -- <-- SP (must be aligned to 16)
In the example above, with Zvl64b we are decrementing SP by 12 bytes
which does not leave SP correctly aligned. We therefore introduce an
extra VLENB-sized amount used for alignment. This would therefore ensure
the total stack size was 16 bytes (48 for Zvl128b, 80 for Zvl256b, etc):
|------------------------------| -- <-- FP
| 8-byte callee-save | | |
|------------------------------| | |
| one VLENB-sized padding obj | | |
| one VLENB-sized RVV object | | |
|------------------------------| | |
| 8-byte local variable | | |
|------------------------------| -- <-- SP
A new RVV invariant has been introduced in this patch, which is that the
base of the RVV stack itself is now always aligned to 16 bytes, not 8 as
before. This keeps us more in line with the scalar stack and should be
easier to reason about. The calculation of the RVV padding has thus
changed to be the amount required to align the scalar local variable
section to the RVV section's alignment. This amount is further rounded
up when setting up the initial stack to keep everything aligned:
|------------------------------| -- <-- FP
| 8-byte callee-save |
|------------------------------|
| |
| RVV objects |
| (aligned to at least 16) |
| |
|------------------------------|
| RVV padding of 8 bytes |
|------------------------------|
| 8-byte local variable |
|------------------------------| -- <-- SP
In the example above, it's clear that we need 8 bytes of padding to keep
the RVV section aligned to 16 when using SP. But to keep SP *itself*
aligned to 16 we can't decrement the initial stack pointer by 24 - we
have to round up to 32.
With the RVV section correctly aligned, the second bug fixed by
this patch is that RVV objects themselves are now correctly aligned. We
were previously only guaranteeing an alignment of 8 bytes, even if they
required a higher alignment. This is relatively simple and in practice
we see more rounding up of VLEN amounts to account for alignment in
between objects:
|------------------------------|
| RVV object (aligned to 16) |
|------------------------------|
| no padding necessary |
|------------------------------|
| 2*VLENB RVV object (align 16)|
|------------------------------|
| VLENB alignment padding |
|------------------------------|
| RVV object (align 32) |
|------------------------------|
| 3*VLENB alignment padding |
|------------------------------|
| VLENB RVV object (align 32) |
|------------------------------| -- <-- base of RVV section
Note that a lot of the regressions in codegen owing to the new alignment
rules are correct but actually only strictly necessary for Zvl64b (and
Zvl32b but that's not really supported). I plan a follow-up patch to
take the known VLEN into account when padding for alignment.
Reviewed By: StephenFan
Differential Revision: https://reviews.llvm.org/D125787
112 lines
4.1 KiB
C++
112 lines
4.1 KiB
C++
//=- RISCVMachineFunctionInfo.h - RISCV machine function info -----*- C++ -*-=//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares RISCV-specific per-machine-function information.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_RISCV_RISCVMACHINEFUNCTIONINFO_H
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#define LLVM_LIB_TARGET_RISCV_RISCVMACHINEFUNCTIONINFO_H
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#include "RISCVSubtarget.h"
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#include "llvm/CodeGen/MIRYamlMapping.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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namespace llvm {
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class RISCVMachineFunctionInfo;
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namespace yaml {
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struct RISCVMachineFunctionInfo final : public yaml::MachineFunctionInfo {
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int VarArgsFrameIndex;
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int VarArgsSaveSize;
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RISCVMachineFunctionInfo() = default;
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RISCVMachineFunctionInfo(const llvm::RISCVMachineFunctionInfo &MFI);
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void mappingImpl(yaml::IO &YamlIO) override;
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~RISCVMachineFunctionInfo() = default;
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};
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template <> struct MappingTraits<RISCVMachineFunctionInfo> {
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static void mapping(IO &YamlIO, RISCVMachineFunctionInfo &MFI) {
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YamlIO.mapOptional("varArgsFrameIndex", MFI.VarArgsFrameIndex);
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YamlIO.mapOptional("varArgsSaveSize", MFI.VarArgsSaveSize);
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}
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};
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} // end namespace yaml
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/// RISCVMachineFunctionInfo - This class is derived from MachineFunctionInfo
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/// and contains private RISCV-specific information for each MachineFunction.
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class RISCVMachineFunctionInfo : public MachineFunctionInfo {
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private:
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/// FrameIndex for start of varargs area
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int VarArgsFrameIndex = 0;
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/// Size of the save area used for varargs
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int VarArgsSaveSize = 0;
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/// FrameIndex used for transferring values between 64-bit FPRs and a pair
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/// of 32-bit GPRs via the stack.
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int MoveF64FrameIndex = -1;
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/// Size of any opaque stack adjustment due to save/restore libcalls.
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unsigned LibCallStackSize = 0;
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/// Size of RVV stack.
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uint64_t RVVStackSize = 0;
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/// Alignment of RVV stack.
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Align RVVStackAlign;
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/// Padding required to keep RVV stack aligned within the main stack.
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uint64_t RVVPadding = 0;
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/// Size of stack frame to save callee saved registers
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unsigned CalleeSavedStackSize = 0;
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public:
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RISCVMachineFunctionInfo(const MachineFunction &MF) {}
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int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
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void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
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unsigned getVarArgsSaveSize() const { return VarArgsSaveSize; }
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void setVarArgsSaveSize(int Size) { VarArgsSaveSize = Size; }
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int getMoveF64FrameIndex(MachineFunction &MF) {
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if (MoveF64FrameIndex == -1)
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MoveF64FrameIndex =
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MF.getFrameInfo().CreateStackObject(8, Align(8), false);
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return MoveF64FrameIndex;
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}
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unsigned getLibCallStackSize() const { return LibCallStackSize; }
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void setLibCallStackSize(unsigned Size) { LibCallStackSize = Size; }
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bool useSaveRestoreLibCalls(const MachineFunction &MF) const {
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// We cannot use fixed locations for the callee saved spill slots if the
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// function uses a varargs save area, or is an interrupt handler.
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return MF.getSubtarget<RISCVSubtarget>().enableSaveRestore() &&
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VarArgsSaveSize == 0 && !MF.getFrameInfo().hasTailCall() &&
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!MF.getFunction().hasFnAttribute("interrupt");
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}
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uint64_t getRVVStackSize() const { return RVVStackSize; }
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void setRVVStackSize(uint64_t Size) { RVVStackSize = Size; }
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Align getRVVStackAlign() const { return RVVStackAlign; }
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void setRVVStackAlign(Align StackAlign) { RVVStackAlign = StackAlign; }
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uint64_t getRVVPadding() const { return RVVPadding; }
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void setRVVPadding(uint64_t Padding) { RVVPadding = Padding; }
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unsigned getCalleeSavedStackSize() const { return CalleeSavedStackSize; }
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void setCalleeSavedStackSize(unsigned Size) { CalleeSavedStackSize = Size; }
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void initializeBaseYamlFields(const yaml::RISCVMachineFunctionInfo &YamlMFI);
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};
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} // end namespace llvm
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#endif // LLVM_LIB_TARGET_RISCV_RISCVMACHINEFUNCTIONINFO_H
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