- Update pr labeler so new SPIRV files get properly labeled. - Add distance target builtin to BuiltinsSPIRV.td. - Update TargetBuiltins.h to account for spirv builtins. - Update clang basic CMakeLists.txt to build spirv builtin tablegen. - Hook up sema for SPIRV in Sema.h|cpp, SemaSPIRV.h|cpp, and SemaChecking.cpp. - Hookup sprv target builtins to SPIR.h|SPIR.cpp target. - Update GBuiltin.cpp to emit spirv intrinsics when we get the expected spirv target builtin. Consensus was reach in this RFC to add both target builtins and pattern matching: https://discourse.llvm.org/t/rfc-add-targetbuiltins-for-spirv-to-support-hlsl/83329. pattern matching will come in a separate pr this one just sets up the groundwork to do target builtins for spirv. partially resolves [#99107](https://github.com/llvm/llvm-project/issues/99107)
145 lines
5.5 KiB
C++
145 lines
5.5 KiB
C++
//===--- SPIR.cpp - Implement SPIR and SPIR-V target feature support ------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements SPIR and SPIR-V TargetInfo objects.
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//
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//===----------------------------------------------------------------------===//
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#include "SPIR.h"
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#include "AMDGPU.h"
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#include "Targets.h"
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#include "clang/Basic/MacroBuilder.h"
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#include "clang/Basic/TargetBuiltins.h"
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#include "llvm/TargetParser/TargetParser.h"
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using namespace clang;
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using namespace clang::targets;
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static constexpr Builtin::Info BuiltinInfo[] = {
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#define BUILTIN(ID, TYPE, ATTRS) \
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{#ID, TYPE, ATTRS, nullptr, HeaderDesc::NO_HEADER, ALL_LANGUAGES},
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#include "clang/Basic/BuiltinsSPIRV.inc"
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};
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ArrayRef<Builtin::Info> SPIRVTargetInfo::getTargetBuiltins() const {
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return llvm::ArrayRef(BuiltinInfo,
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clang::SPIRV::LastTSBuiltin - Builtin::FirstTSBuiltin);
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}
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void SPIRTargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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DefineStd(Builder, "SPIR", Opts);
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}
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void SPIR32TargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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SPIRTargetInfo::getTargetDefines(Opts, Builder);
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DefineStd(Builder, "SPIR32", Opts);
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}
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void SPIR64TargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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SPIRTargetInfo::getTargetDefines(Opts, Builder);
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DefineStd(Builder, "SPIR64", Opts);
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}
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void BaseSPIRVTargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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DefineStd(Builder, "SPIRV", Opts);
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}
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void SPIRVTargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
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}
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void SPIRV32TargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
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DefineStd(Builder, "SPIRV32", Opts);
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}
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void SPIRV64TargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
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DefineStd(Builder, "SPIRV64", Opts);
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}
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static const AMDGPUTargetInfo AMDGPUTI(llvm::Triple("amdgcn-amd-amdhsa"), {});
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ArrayRef<const char *> SPIRV64AMDGCNTargetInfo::getGCCRegNames() const {
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return AMDGPUTI.getGCCRegNames();
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}
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bool SPIRV64AMDGCNTargetInfo::initFeatureMap(
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llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef,
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const std::vector<std::string> &FeatureVec) const {
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llvm::AMDGPU::fillAMDGPUFeatureMap({}, getTriple(), Features);
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return TargetInfo::initFeatureMap(Features, Diags, {}, FeatureVec);
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}
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bool SPIRV64AMDGCNTargetInfo::validateAsmConstraint(
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const char *&Name, TargetInfo::ConstraintInfo &Info) const {
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return AMDGPUTI.validateAsmConstraint(Name, Info);
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}
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std::string
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SPIRV64AMDGCNTargetInfo::convertConstraint(const char *&Constraint) const {
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return AMDGPUTI.convertConstraint(Constraint);
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}
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ArrayRef<Builtin::Info> SPIRV64AMDGCNTargetInfo::getTargetBuiltins() const {
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return AMDGPUTI.getTargetBuiltins();
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}
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void SPIRV64AMDGCNTargetInfo::getTargetDefines(const LangOptions &Opts,
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MacroBuilder &Builder) const {
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BaseSPIRVTargetInfo::getTargetDefines(Opts, Builder);
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DefineStd(Builder, "SPIRV64", Opts);
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Builder.defineMacro("__AMD__");
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Builder.defineMacro("__AMDGPU__");
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Builder.defineMacro("__AMDGCN__");
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}
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void SPIRV64AMDGCNTargetInfo::setAuxTarget(const TargetInfo *Aux) {
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assert(Aux && "Cannot invoke setAuxTarget without a valid auxiliary target!");
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// This is a 1:1 copy of AMDGPUTargetInfo::setAuxTarget()
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assert(HalfFormat == Aux->HalfFormat);
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assert(FloatFormat == Aux->FloatFormat);
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assert(DoubleFormat == Aux->DoubleFormat);
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// On x86_64 long double is 80-bit extended precision format, which is
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// not supported by AMDGPU. 128-bit floating point format is also not
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// supported by AMDGPU. Therefore keep its own format for these two types.
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auto SaveLongDoubleFormat = LongDoubleFormat;
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auto SaveFloat128Format = Float128Format;
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auto SaveLongDoubleWidth = LongDoubleWidth;
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auto SaveLongDoubleAlign = LongDoubleAlign;
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copyAuxTarget(Aux);
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LongDoubleFormat = SaveLongDoubleFormat;
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Float128Format = SaveFloat128Format;
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LongDoubleWidth = SaveLongDoubleWidth;
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LongDoubleAlign = SaveLongDoubleAlign;
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// For certain builtin types support on the host target, claim they are
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// supported to pass the compilation of the host code during the device-side
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// compilation.
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// FIXME: As the side effect, we also accept `__float128` uses in the device
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// code. To reject these builtin types supported in the host target but not in
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// the device target, one approach would support `device_builtin` attribute
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// so that we could tell the device builtin types from the host ones. This
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// also solves the different representations of the same builtin type, such
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// as `size_t` in the MSVC environment.
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if (Aux->hasFloat128Type()) {
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HasFloat128 = true;
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Float128Format = DoubleFormat;
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}
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}
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