66acb26946
HIPAMD relies on the `amdgpu_flat_work_group_size` attribute to implement key functionality such as the `__launch_bounds__` `__global__` function annotation. This attribute is not available / directly translatable to SPIR-V, hence as it is AMDGCN flavoured SPIR-V suffers from information loss. This patch addresses that limitation by converting the unsupported attribute into the `max_work_group_size` attribute which maps to [`MaxWorkgroupSizeINTEL`](https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_kernel_attributes.asciidoc), which is available in / handled by SPIR-V. When reverse translating from SPIR-V to AMDGCN LLVMIR we invert the map and add the original AMDGPU attribute.
100 lines
5.4 KiB
Plaintext
100 lines
5.4 KiB
Plaintext
// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa \
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// RUN: -fcuda-is-device -emit-llvm -o - -x hip %s \
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// RUN: | FileCheck -check-prefixes=CHECK,DEFAULT %s
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// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa --gpu-max-threads-per-block=1024 \
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// RUN: -fcuda-is-device -emit-llvm -o - -x hip %s \
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// RUN: | FileCheck -check-prefixes=CHECK,MAX1024 %s
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// RUN: %clang_cc1 -triple spirv64-amd-amdhsa --gpu-max-threads-per-block=1024 \
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// RUN: -fcuda-is-device -emit-llvm -o - -x hip %s \
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// RUN: | FileCheck -check-prefixes=CHECK-SPIRV,MAX1024-SPIRV %s
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// RUN: %clang_cc1 -triple nvptx \
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// RUN: -fcuda-is-device -emit-llvm -o - %s | FileCheck %s \
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// RUN: -check-prefix=NAMD
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm \
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// RUN: -verify -o - -x hip %s | FileCheck -check-prefix=NAMD %s
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// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -foffload-uniform-block \
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// RUN: -fcuda-is-device -emit-llvm -o - -x hip %s \
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// RUN: | FileCheck -check-prefixes=CHECK,DEFAULT %s
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// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -fno-offload-uniform-block \
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// RUN: -fcuda-is-device -emit-llvm -o - -x hip %s \
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// RUN: | FileCheck -check-prefixes=NOUB %s
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#include "Inputs/cuda.h"
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__global__ void flat_work_group_size_default() {
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// CHECK: define{{.*}} amdgpu_kernel void @_Z28flat_work_group_size_defaultv() [[FLAT_WORK_GROUP_SIZE_DEFAULT:#[0-9]+]]
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// CHECK-SPIRV: define{{.*}} spir_kernel void @_Z28flat_work_group_size_defaultv(){{.*}} !max_work_group_size [[MAX_WORK_GROUP_SIZE_DEFAULT:![0-9]+]]
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// NOUB: define{{.*}} void @_Z28flat_work_group_size_defaultv() [[NOUB:#[0-9]+]]
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}
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__attribute__((amdgpu_flat_work_group_size(32, 64))) // expected-no-diagnostics
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__global__ void flat_work_group_size_32_64() {
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// CHECK: define{{.*}} amdgpu_kernel void @_Z26flat_work_group_size_32_64v() [[FLAT_WORK_GROUP_SIZE_32_64:#[0-9]+]]
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// CHECK-SPIRV: define{{.*}} spir_kernel void @_Z26flat_work_group_size_32_64v(){{.*}} !max_work_group_size [[MAX_WORK_GROUP_SIZE_64:![0-9]+]]
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}
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__attribute__((amdgpu_waves_per_eu(2))) // expected-no-diagnostics
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__global__ void waves_per_eu_2() {
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// CHECK: define{{.*}} amdgpu_kernel void @_Z14waves_per_eu_2v() [[WAVES_PER_EU_2:#[0-9]+]]
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}
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__attribute__((amdgpu_num_sgpr(32))) // expected-no-diagnostics
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__global__ void num_sgpr_32() {
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// CHECK: define{{.*}} amdgpu_kernel void @_Z11num_sgpr_32v() [[NUM_SGPR_32:#[0-9]+]]
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}
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__attribute__((amdgpu_num_vgpr(64))) // expected-no-diagnostics
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__global__ void num_vgpr_64() {
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// CHECK: define{{.*}} amdgpu_kernel void @_Z11num_vgpr_64v() [[NUM_VGPR_64:#[0-9]+]]
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}
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__attribute__((amdgpu_max_num_work_groups(32, 4, 2))) // expected-no-diagnostics
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__global__ void max_num_work_groups_32_4_2() {
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// CHECK: define{{.*}} amdgpu_kernel void @_Z26max_num_work_groups_32_4_2v() [[MAX_NUM_WORK_GROUPS_32_4_2:#[0-9]+]]
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}
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__attribute__((amdgpu_max_num_work_groups(32))) // expected-no-diagnostics
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__global__ void max_num_work_groups_32() {
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// CHECK: define{{.*}} amdgpu_kernel void @_Z22max_num_work_groups_32v() [[MAX_NUM_WORK_GROUPS_32_1_1:#[0-9]+]]
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}
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__attribute__((amdgpu_max_num_work_groups(32,1))) // expected-no-diagnostics
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__global__ void max_num_work_groups_32_1() {
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// CHECK: define{{.*}} amdgpu_kernel void @_Z24max_num_work_groups_32_1v() [[MAX_NUM_WORK_GROUPS_32_1_1:#[0-9]+]]
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}
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template<unsigned a>
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__attribute__((amdgpu_max_num_work_groups(a, 4, 2)))
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__global__ void template_a_4_2_max_num_work_groups() {}
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template __global__ void template_a_4_2_max_num_work_groups<32>();
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// CHECK: define{{.*}} amdgpu_kernel void @_Z34template_a_4_2_max_num_work_groupsILj32EEvv() [[MAX_NUM_WORK_GROUPS_32_4_2:#[0-9]+]]
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template<unsigned a>
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__attribute__((amdgpu_max_num_work_groups(32, a, 2)))
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__global__ void template_32_a_2_max_num_work_groups() {}
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template __global__ void template_32_a_2_max_num_work_groups<4>();
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// CHECK: define{{.*}} amdgpu_kernel void @_Z35template_32_a_2_max_num_work_groupsILj4EEvv() [[MAX_NUM_WORK_GROUPS_32_4_2:#[0-9]+]]
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template<unsigned a>
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__attribute__((amdgpu_max_num_work_groups(32, 4, a)))
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__global__ void template_32_4_a_max_num_work_groups() {}
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template __global__ void template_32_4_a_max_num_work_groups<2>();
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// CHECK: define{{.*}} amdgpu_kernel void @_Z35template_32_4_a_max_num_work_groupsILj2EEvv() [[MAX_NUM_WORK_GROUPS_32_4_2:#[0-9]+]]
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// Make sure this is silently accepted on other targets.
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// NAMD-NOT: "amdgpu-flat-work-group-size"
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// NAMD-NOT: "amdgpu-waves-per-eu"
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// NAMD-NOT: "amdgpu-num-vgpr"
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// NAMD-NOT: "amdgpu-num-sgpr"
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// NAMD-NOT: "amdgpu-max-num-work-groups"
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// DEFAULT-DAG: attributes [[FLAT_WORK_GROUP_SIZE_DEFAULT]] = {{.*}}"amdgpu-flat-work-group-size"="1,1024"{{.*}}"uniform-work-group-size"="true"
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// MAX1024-DAG: attributes [[FLAT_WORK_GROUP_SIZE_DEFAULT]] = {{.*}}"amdgpu-flat-work-group-size"="1,1024"
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// MAX1024-SPIRV-DAG: [[MAX_WORK_GROUP_SIZE_DEFAULT]] = !{i32 1024, i32 1, i32 1}
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// CHECK-DAG: attributes [[FLAT_WORK_GROUP_SIZE_32_64]] = {{.*}}"amdgpu-flat-work-group-size"="32,64"
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// CHECK-SPIRV-DAG: [[MAX_WORK_GROUP_SIZE_64]] = !{i32 64, i32 1, i32 1}
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// CHECK-DAG: attributes [[WAVES_PER_EU_2]] = {{.*}}"amdgpu-waves-per-eu"="2"
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// CHECK-DAG: attributes [[NUM_SGPR_32]] = {{.*}}"amdgpu-num-sgpr"="32"
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// CHECK-DAG: attributes [[NUM_VGPR_64]] = {{.*}}"amdgpu-num-vgpr"="64"
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// CHECK-DAG: attributes [[MAX_NUM_WORK_GROUPS_32_4_2]] = {{.*}}"amdgpu-max-num-workgroups"="32,4,2"
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// CHECK-DAG: attributes [[MAX_NUM_WORK_GROUPS_32_1_1]] = {{.*}}"amdgpu-max-num-workgroups"="32,1,1"
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// NOUB-NOT: "uniform-work-group-size"="true"
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