bd92e46204
This introduces `__builtin_hlsl_resource_getpointer`, which lowers to `llvm.dx.resource.getpointer` and is used to implement indexing into resources. This will only work through the backend for typed buffers at this point, but the changes to structured buffers should be correct as far as the frontend is concerned. Note: We probably want this to return a reference in the HLSL device address space, but for now we're just using address space 0. Creating a device address space and updating this code can be done later as necessary. Fixes #95956
23 lines
1.3 KiB
HLSL
23 lines
1.3 KiB
HLSL
// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.0-compute -emit-llvm -o - -O0 %s | FileCheck %s
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StructuredBuffer<int> In;
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RWStructuredBuffer<int> Out1;
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RasterizerOrderedStructuredBuffer<int> Out2;
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[numthreads(1,1,1)]
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void main(unsigned GI : SV_GroupIndex) {
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// CHECK: define void @main()
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// CHECK: %[[INPTR:.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i32_0_0t(target("dx.RawBuffer", i32, 0, 0) %{{.*}}, i32 %{{.*}})
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// CHECK: %[[LOAD:.*]] = load i32, ptr %[[INPTR]]
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// CHECK: %[[OUT1PTR:.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i32_1_0t(target("dx.RawBuffer", i32, 1, 0) %{{.*}}, i32 %{{.*}})
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// CHECK: store i32 %[[LOAD]], ptr %[[OUT1PTR]]
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Out1[GI] = In[GI];
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// CHECK: %[[INPTR:.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i32_0_0t(target("dx.RawBuffer", i32, 0, 0) %{{.*}}, i32 %{{.*}})
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// CHECK: %[[LOAD:.*]] = load i32, ptr %[[INPTR]]
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// CHECK: %[[OUT2PTR:.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @llvm.dx.resource.getpointer.p0.tdx.RawBuffer_i32_1_1t(target("dx.RawBuffer", i32, 1, 1) %{{.*}}, i32 %{{.*}})
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// CHECK: store i32 %[[LOAD]], ptr %[[OUT2PTR]]
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Out2[GI] = In[GI];
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}
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