https://developer.arm.com/documentation/ddi0601/2024-06/AArch64-Registers/FPMR--Floating-point-Mode-Register for details of the register.
84 lines
2.6 KiB
Python
84 lines
2.6 KiB
Python
"""
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Test lldb's ability to read and write the AArch64 FPMR register.
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"""
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import lldb
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from lldbsuite.test.decorators import *
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from lldbsuite.test.lldbtest import *
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from lldbsuite.test import lldbutil
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class AArch64LinuxFPMR(TestBase):
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NO_DEBUG_INFO_TESTCASE = True
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# The value set by the inferior.
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EXPECTED_FPMR = (0b101010 << 32) | 0b101
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EXPECTED_FPMR_FIELDS = ["LSCALE2 = 42", "F8S1 = FP8_E4M3 | 0x4"]
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@skipUnlessArch("aarch64")
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@skipUnlessPlatform(["linux"])
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def test_fpmr_register_live(self):
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if not self.isAArch64FPMR():
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self.skipTest("FPMR must be present.")
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self.build()
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self.runCmd("file " + self.getBuildArtifact("a.out"), CURRENT_EXECUTABLE_SET)
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lldbutil.run_break_set_by_file_and_line(
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self,
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"main.c",
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line_number("main.c", "// Set break point at this line."),
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num_expected_locations=1,
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)
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self.runCmd("run", RUN_SUCCEEDED)
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if self.process().GetState() == lldb.eStateExited:
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self.fail("Test program failed to run.")
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self.expect(
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"thread list",
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STOPPED_DUE_TO_BREAKPOINT,
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substrs=["stopped", "stop reason = breakpoint"],
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)
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# This has been set by the program.
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self.expect(
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"register read --all",
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substrs=[
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"Floating Point Mode Register",
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f"fpmr = {self.EXPECTED_FPMR:#018x}",
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],
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)
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if self.hasXMLSupport():
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self.expect("register read fpmr", substrs=self.EXPECTED_FPMR_FIELDS)
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# Write a value for the program to find. Same fields but with bit values
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# inverted.
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new_fpmr = (0b010101 << 32) | 0b010
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self.runCmd(f"register write fpmr {new_fpmr:#x}")
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# This value should be saved and restored after expressions.
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self.runCmd("p expr_func()")
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self.expect("register read fpmr", substrs=[f"fpmr = {new_fpmr:#018x}"])
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# 0 means the program found the new value in the sysreg as expected.
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self.expect("continue", substrs=["exited with status = 0"])
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@skipIfLLVMTargetMissing("AArch64")
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def test_fpmr_register_core(self):
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if not self.isAArch64FPMR():
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self.skipTest("FPMR must be present.")
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self.runCmd("target create --core corefile")
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self.expect(
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"register read --all",
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substrs=[
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"Floating Point Mode Register",
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f"fpmr = {self.EXPECTED_FPMR:#018x}",
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],
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)
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self.expect("register read fpmr", substrs=self.EXPECTED_FPMR_FIELDS)
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