40a4cbb0f2
Similar to 806761a762
-mtriple= specifies the full target triple while -march= merely sets the
architecture part of the default target triple (e.g. Windows, macOS).
Therefore, -march= is error-prone and not recommended for tests without
a target triple. The issue has been benign as these MIR tests do not
utilize object file format specific detail, but it's good to change
these tests to neighbor files that use -mtriple=x86_64
37 lines
1.5 KiB
YAML
37 lines
1.5 KiB
YAML
# RUN: llc -mtriple=x86_64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses the fast math instruction flags.
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...
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---
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name: baz
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body: |
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bb.0.entry:
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liveins: $xmm0
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; CHECK: %0:fr32 = COPY $xmm0
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%0:fr32 = COPY $xmm0
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; CHECK: %1:fr32 = nnan VMULSSrr %0, %0, implicit $mxcsr
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%1:fr32 = nnan VMULSSrr %0, %0, implicit $mxcsr
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; CHECK: %2:fr32 = ninf VMULSSrr %1, %1, implicit $mxcsr
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%2:fr32 = ninf VMULSSrr %1, %1, implicit $mxcsr
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; CHECK: %3:fr32 = nsz VMULSSrr %2, %2, implicit $mxcsr
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%3:fr32 = nsz VMULSSrr %2, %2, implicit $mxcsr
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; CHECK: %4:fr32 = arcp VMULSSrr %3, %3, implicit $mxcsr
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%4:fr32 = arcp VMULSSrr %3, %3, implicit $mxcsr
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; CHECK: %5:fr32 = contract VMULSSrr %4, %4, implicit $mxcsr
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%5:fr32 = contract VMULSSrr %4, %4, implicit $mxcsr
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; CHECK: %6:fr32 = afn VMULSSrr %5, %5, implicit $mxcsr
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%6:fr32 = afn VMULSSrr %5, %5, implicit $mxcsr
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; CHECK: %7:fr32 = reassoc VMULSSrr %6, %6, implicit $mxcsr
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%7:fr32 = reassoc VMULSSrr %6, %6, implicit $mxcsr
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; CHECK: %8:fr32 = nsz arcp contract afn reassoc VMULSSrr %7, %7, implicit $mxcsr
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%8:fr32 = nsz arcp contract afn reassoc VMULSSrr %7, %7, implicit $mxcsr
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; CHECK: %9:fr32 = contract afn reassoc VMULSSrr %8, %8, implicit $mxcsr
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%9:fr32 = contract afn reassoc VMULSSrr %8, %8, implicit $mxcsr
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; CHECK: $xmm0 = COPY %9
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$xmm0 = COPY %9
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; CHECK: RET 0, $xmm0
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RET 0, $xmm0
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...
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