53326ee0cf
Block sorting was assuming reducible CFG. Meaning we always had a best node to continue with. Irreducible CFG makes breaks this assumption, so the algorithm looped indefinitely because no node was a valid candidate. Fixes #116692 --------- Signed-off-by: Nathan Gauër <brioche@google.com>
106 lines
4.0 KiB
LLVM
106 lines
4.0 KiB
LLVM
; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-vulkan-compute %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -mtriple=spirv-unknown-vulkan-compute -O0 %s -o - | FileCheck %s
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target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-G1"
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target triple = "spirv-unknown-vulkan1.3-compute"
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; CHECK-DAG: OpName %[[#process:]] "_Z7processv"
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; CHECK-DAG: OpName %[[#val:]] "val"
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; CHECK-DAG: OpName %[[#i:]] "i"
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; CHECK-DAG: %[[#int_ty:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#int_pfty:]] = OpTypePointer Function %[[#int_ty]]
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; CHECK-DAG: %[[#false:]] = OpConstantFalse
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; CHECK: %[[#process]] = OpFunction %[[#]] DontInline %[[#]]
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define spir_func noundef i32 @_Z7processv() #0 {
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entry:
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%0 = call token @llvm.experimental.convergence.entry()
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; CHECK-DAG: %[[#val]] = OpVariable %[[#int_pfty]] Function
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; CHECK-DAG: %[[#i]] = OpVariable %[[#int_pfty]] Function
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%val = alloca i32, align 4
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%i = alloca i32, align 4
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store i32 0, ptr %val, align 4
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store i32 0, ptr %i, align 4
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br label %for.cond
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; CHECK: OpBranch %[[#for_cond:]]
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for.cond: ; preds = %for.inc, %entry
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; CHECK: %[[#for_cond]] = OpLabel
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%1 = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token %0) ]
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%2 = load i32, ptr %i, align 4
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%cmp = icmp slt i32 %2, 10
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; CHECK: OpLoopMerge %[[#for_end:]] %[[#for_inc:]]
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; CHECK: OpBranchConditional %[[#]] %[[#for_body:]] %[[#for_end]]
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br i1 %cmp, label %for.body, label %for.end
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for.end: ; preds = %for.cond
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br label %for.cond1
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; CHECK: %[[#for_end]] = OpLabel
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; CHECK: OpBranch %[[#for_cond1:]]
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for.cond1: ; preds = %for.cond1, %for.end
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%3 = call token @llvm.experimental.convergence.loop() [ "convergencectrl"(token %0) ]
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store i32 0, ptr %val, align 4
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br label %for.cond1
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; CHECK: %[[#for_cond1]] = OpLabel
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; CHECK: OpLoopMerge %[[#unreachable:]] %[[#for_cond1]]
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; CHECK: OpBranchConditional %[[#false]] %[[#unreachable]] %[[#for_cond1]]
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; CHECK: %[[#unreachable]] = OpLabel
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; CHECK-NEXT: OpUnreachable
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for.body: ; preds = %for.cond
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%4 = load i32, ptr %i, align 4
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store i32 %4, ptr %val, align 4
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br label %for.inc
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; CHECK: %[[#for_body]] = OpLabel
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; CHECK: OpBranch %[[#for_inc]]
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for.inc: ; preds = %for.body
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%5 = load i32, ptr %i, align 4
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%inc = add nsw i32 %5, 1
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store i32 %inc, ptr %i, align 4
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br label %for.cond
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; CHECK: %[[#for_inc]] = OpLabel
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; CHECK: OpBranch %[[#for_cond]]
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}
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; Function Attrs: convergent nocallback nofree nosync nounwind willreturn memory(none)
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declare token @llvm.experimental.convergence.entry() #1
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; Function Attrs: convergent nocallback nofree nosync nounwind willreturn memory(none)
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declare token @llvm.experimental.convergence.loop() #1
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; Function Attrs: convergent noinline norecurse nounwind optnone
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define internal spir_func void @main() #2 {
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entry:
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%0 = call token @llvm.experimental.convergence.entry()
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%call1 = call spir_func noundef i32 @_Z7processv() #4 [ "convergencectrl"(token %0) ]
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ret void
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}
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; Function Attrs: convergent norecurse
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define void @main.1() #3 {
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entry:
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call void @main()
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ret void
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}
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attributes #0 = { convergent noinline nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #1 = { convergent nocallback nofree nosync nounwind willreturn memory(none) }
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attributes #2 = { convergent noinline norecurse nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #3 = { convergent norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #4 = { convergent }
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!llvm.module.flags = !{!0, !1, !2}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{i32 4, !"dx.disable_optimizations", i32 1}
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!2 = !{i32 7, !"frame-pointer", i32 2}
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