3097c60928
Currently it's very difficult to improve the cost model for tail-folded loops because as soon as you add a VPInstruction::computeCost function that adds the costs of instructions such as VPInstruction::ActiveLaneMask and VPInstruction::ExplicitVectorLength the assert in LoopVectorizationPlanner::computeBestVF fails for some tests. This is because the VF chosen by the legacy cost model doesn't match the vplan cost model. See PR #90191. This assert is currently making it difficult to improve the cost model. Hopefully we will be in a position to remove the assert soon, however in order to do that we have to fix up a whole bunch of tests that rely upon the legacy cost model output. I've tried my best to update these tests to use vplan output instead. There is still work needed for the VF=1 case because the vplan cost model is not printed out in this case. I've not attempted to fix those in this patch.
35 lines
1.5 KiB
LLVM
35 lines
1.5 KiB
LLVM
; REQUIRES: asserts
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; RUN: opt < %s -passes=loop-vectorize -mtriple riscv64 -riscv-v-vector-bits-min=128 -mattr="+v" -debug-only=loop-vectorize -S 2>&1 | FileCheck %s
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; CHECK: LV: Loop hints: force=enabled
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; CHECK: LV: Scalar loop costs: 4.
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; ChosenFactor.Cost is 4, but the real cost will be divided by the width, which is 2.
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; CHECK: Cost for VF 2: 4 (Estimated cost per lane: 2.0)
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; Regardless of force vectorization or not, this loop will eventually be vectorized because of the cost model.
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; Therefore, the following message does not need to be printed even if vectorization is explicitly forced in the metadata.
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; CHECK-NOT: LV: Vectorization seems to be not beneficial, but was forced by a user.
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target datalayout = "e-m:e-p:64:64-i64:64-i128:128-n64-S128"
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target triple = "riscv64-unknown-unknown"
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define i64 @foo(ptr nocapture noundef readonly %a, i64 noundef %N, i64 noundef %init) {
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entry:
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br label %for.body
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for.body: ; preds = %entry, %for.body
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%i.06 = phi i64 [ %inc, %for.body ], [ 0, %entry ]
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%rd.05 = phi i64 [ %add, %for.body ], [ %init, %entry ]
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%arrayidx = getelementptr inbounds i64, ptr %a, i64 %i.06
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%0 = load i64, ptr %arrayidx, align 8
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%add = add nsw i64 %0, %rd.05
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%inc = add nuw i64 %i.06, 1
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%exitcond.not = icmp eq i64 %inc, %N
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br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !0
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for.end: ; preds = %for.body
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ret i64 %add
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}
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!0 = !{!0, !1}
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!1 = !{!"llvm.loop.vectorize.enable", i1 true}
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