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41a94de75caacb979070ec7a010dfe3c4e9f116f
clang-p2996/llvm/test/tools/llvm-mca
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Min-Yih Hsu 90d79ca4c7 [RISCV] Update the latencies of MUL and CPOP in SiFive P400 scheduling model (#122007)
According to llvm-exegesis, they should have around 2 cycles of latency
on P400 cores.
2025-01-07 15:01:05 -08:00
..
AArch64
[AArch64][machine-scheduler][Neoverse-N2] fdiv is blocking (#119206)
2025-01-06 21:57:15 +00:00
AMDGPU
AMDGPU: Verify f8f6f4 formats in assembler (#117826)
2024-11-26 23:45:03 -05:00
ARM
[ARM] Record store with pre/post-indexed addressing as mayStore
2025-01-07 09:39:05 +01:00
JSON/X86
[llvm-mca] Add bottle-neck analysis to JSON output. (#90056)
2024-08-19 17:16:19 +01:00
RISCV
[RISCV] Update the latencies of MUL and CPOP in SiFive P400 scheduling model (#122007)
2025-01-07 15:01:05 -08:00
SystemZ
…
X86
[X86] IceLakeServer - fix port usage for PINSR instructions
2024-12-09 10:50:01 +00:00
invalid_input_file_name.test
…
lit.local.cfg
…
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