Previously, the pass only supported emulation of loading vector sizes that are multiples of the emulated data type. This patch expands its support for emulating sizes that are not multiples of byte sizes. In such cases, the element values are packed back-to-back to preserve memory space. To give a concrete example: if an input has type `memref<3x3xi2>`, it is actually occupying 3 bytes in memory, with the first 18 bits storing the values and the last 6 bits as padding. The slice of `vector<3xi2>` at index `[2, 0]` is stored in memory from bit 12 to bit 18. To properly load the elements from bit 12 to bit 18 from memory, first load byte 2 and byte 3, and convert it to a vector of `i2` type; then extract bits 4 to 10 (element index 2-5) to form a `vector<3xi2>`. A limitation of this patch is that the linearized index of the unaligned vector has to be known at compile time. Extra code needs to be emitted to handle it if the condition does not hold. The following ops are updated: * `vector::LoadOp` * `vector::TransferReadOp` * `vector::MaskedLoadOp`
213 lines
7.6 KiB
C++
213 lines
7.6 KiB
C++
//===- MemRefUtils.cpp - Utilities to support the MemRef dialect ----------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements utilities for the MemRef dialect.
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//
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//===----------------------------------------------------------------------===//
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#include "mlir/Dialect/MemRef/Utils/MemRefUtils.h"
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#include "mlir/Dialect/Affine/IR/AffineOps.h"
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#include "mlir/Dialect/Arith/Utils/Utils.h"
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#include "mlir/Dialect/MemRef/IR/MemRef.h"
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#include "mlir/Dialect/Vector/IR/VectorOps.h"
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#include "mlir/Interfaces/ViewLikeInterface.h"
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#include "llvm/ADT/STLExtras.h"
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namespace mlir {
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namespace memref {
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bool isStaticShapeAndContiguousRowMajor(MemRefType type) {
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if (!type.hasStaticShape())
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return false;
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SmallVector<int64_t> strides;
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int64_t offset;
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if (failed(getStridesAndOffset(type, strides, offset)))
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return false;
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// MemRef is contiguous if outer dimensions are size-1 and inner
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// dimensions have unit strides.
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int64_t runningStride = 1;
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int64_t curDim = strides.size() - 1;
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// Finds all inner dimensions with unit strides.
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while (curDim >= 0 && strides[curDim] == runningStride) {
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runningStride *= type.getDimSize(curDim);
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--curDim;
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}
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// Check if other dimensions are size-1.
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while (curDim >= 0 && type.getDimSize(curDim) == 1) {
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--curDim;
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}
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// All dims are unit-strided or size-1.
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return curDim < 0;
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}
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std::pair<LinearizedMemRefInfo, OpFoldResult> getLinearizedMemRefOffsetAndSize(
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OpBuilder &builder, Location loc, int srcBits, int dstBits,
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OpFoldResult offset, ArrayRef<OpFoldResult> sizes,
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ArrayRef<OpFoldResult> strides, ArrayRef<OpFoldResult> indices) {
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unsigned sourceRank = sizes.size();
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assert(sizes.size() == strides.size() &&
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"expected as many sizes as strides for a memref");
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SmallVector<OpFoldResult> indicesVec = llvm::to_vector(indices);
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if (indices.empty())
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indicesVec.resize(sourceRank, builder.getIndexAttr(0));
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assert(indicesVec.size() == strides.size() &&
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"expected as many indices as rank of memref");
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// Create the affine symbols and values for linearization.
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SmallVector<AffineExpr> symbols(2 * sourceRank);
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bindSymbolsList(builder.getContext(), MutableArrayRef{symbols});
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AffineExpr addMulMap = builder.getAffineConstantExpr(0);
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AffineExpr mulMap = builder.getAffineConstantExpr(1);
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SmallVector<OpFoldResult> offsetValues(2 * sourceRank);
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for (unsigned i = 0; i < sourceRank; ++i) {
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unsigned offsetIdx = 2 * i;
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addMulMap = addMulMap + symbols[offsetIdx] * symbols[offsetIdx + 1];
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offsetValues[offsetIdx] = indicesVec[i];
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offsetValues[offsetIdx + 1] = strides[i];
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mulMap = mulMap * symbols[i];
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}
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// Adjust linearizedIndices and size by the scale factor (dstBits / srcBits).
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int64_t scaler = dstBits / srcBits;
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mulMap = mulMap.floorDiv(scaler);
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OpFoldResult linearizedIndices = affine::makeComposedFoldedAffineApply(
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builder, loc, addMulMap.floorDiv(scaler), offsetValues);
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OpFoldResult linearizedSize =
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affine::makeComposedFoldedAffineApply(builder, loc, mulMap, sizes);
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// Adjust baseOffset by the scale factor (dstBits / srcBits).
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AffineExpr s0;
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bindSymbols(builder.getContext(), s0);
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OpFoldResult adjustBaseOffset = affine::makeComposedFoldedAffineApply(
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builder, loc, s0.floorDiv(scaler), {offset});
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OpFoldResult intraVectorOffset = affine::makeComposedFoldedAffineApply(
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builder, loc, addMulMap % scaler, offsetValues);
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return {{adjustBaseOffset, linearizedSize, intraVectorOffset},
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linearizedIndices};
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}
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LinearizedMemRefInfo
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getLinearizedMemRefOffsetAndSize(OpBuilder &builder, Location loc, int srcBits,
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int dstBits, OpFoldResult offset,
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ArrayRef<OpFoldResult> sizes) {
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SmallVector<OpFoldResult> strides(sizes.size());
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if (!sizes.empty()) {
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strides.back() = builder.getIndexAttr(1);
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AffineExpr s0, s1;
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bindSymbols(builder.getContext(), s0, s1);
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for (int index = sizes.size() - 1; index > 0; --index) {
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strides[index - 1] = affine::makeComposedFoldedAffineApply(
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builder, loc, s0 * s1,
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ArrayRef<OpFoldResult>{strides[index], sizes[index]});
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}
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}
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LinearizedMemRefInfo linearizedMemRefInfo;
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std::tie(linearizedMemRefInfo, std::ignore) =
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getLinearizedMemRefOffsetAndSize(builder, loc, srcBits, dstBits, offset,
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sizes, strides);
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return linearizedMemRefInfo;
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}
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/// Returns true if all the uses of op are not read/load.
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/// There can be SubviewOp users as long as all its users are also
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/// StoreOp/transfer_write. If return true it also fills out the uses, if it
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/// returns false uses is unchanged.
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static bool resultIsNotRead(Operation *op, std::vector<Operation *> &uses) {
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std::vector<Operation *> opUses;
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for (OpOperand &use : op->getUses()) {
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Operation *useOp = use.getOwner();
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if (isa<memref::DeallocOp>(useOp) ||
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(useOp->getNumResults() == 0 && useOp->getNumRegions() == 0 &&
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!mlir::hasEffect<MemoryEffects::Read>(useOp)) ||
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(isa<memref::SubViewOp>(useOp) && resultIsNotRead(useOp, opUses))) {
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opUses.push_back(useOp);
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continue;
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}
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return false;
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}
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uses.insert(uses.end(), opUses.begin(), opUses.end());
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return true;
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}
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void eraseDeadAllocAndStores(RewriterBase &rewriter, Operation *parentOp) {
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std::vector<Operation *> opToErase;
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parentOp->walk([&](memref::AllocOp op) {
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std::vector<Operation *> candidates;
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if (resultIsNotRead(op, candidates)) {
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opToErase.insert(opToErase.end(), candidates.begin(), candidates.end());
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opToErase.push_back(op.getOperation());
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}
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});
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for (Operation *op : opToErase)
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rewriter.eraseOp(op);
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}
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static SmallVector<OpFoldResult>
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computeSuffixProductIRBlockImpl(Location loc, OpBuilder &builder,
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ArrayRef<OpFoldResult> sizes,
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OpFoldResult unit) {
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SmallVector<OpFoldResult> strides(sizes.size(), unit);
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AffineExpr s0, s1;
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bindSymbols(builder.getContext(), s0, s1);
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for (int64_t r = strides.size() - 1; r > 0; --r) {
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strides[r - 1] = affine::makeComposedFoldedAffineApply(
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builder, loc, s0 * s1, {strides[r], sizes[r]});
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}
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return strides;
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}
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SmallVector<OpFoldResult>
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computeSuffixProductIRBlock(Location loc, OpBuilder &builder,
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ArrayRef<OpFoldResult> sizes) {
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OpFoldResult unit = builder.getIndexAttr(1);
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return computeSuffixProductIRBlockImpl(loc, builder, sizes, unit);
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}
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MemrefValue skipFullyAliasingOperations(MemrefValue source) {
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while (auto op = source.getDefiningOp()) {
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if (auto subViewOp = dyn_cast<memref::SubViewOp>(op);
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subViewOp && subViewOp.hasZeroOffset() && subViewOp.hasUnitStride()) {
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// A `memref.subview` with an all zero offset, and all unit strides, still
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// points to the same memory.
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source = cast<MemrefValue>(subViewOp.getSource());
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} else if (auto castOp = dyn_cast<memref::CastOp>(op)) {
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// A `memref.cast` still points to the same memory.
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source = castOp.getSource();
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} else {
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return source;
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}
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}
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return source;
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}
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MemrefValue skipViewLikeOps(MemrefValue source) {
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while (auto op = source.getDefiningOp()) {
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if (auto viewLike = dyn_cast<ViewLikeOpInterface>(op)) {
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source = cast<MemrefValue>(viewLike.getViewSource());
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continue;
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}
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return source;
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}
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return source;
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}
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} // namespace memref
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} // namespace mlir
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