Files
clang-p2996/mlir/test/Conversion/MemRefToLLVM
MaheshRavishankar 8cd94e0b6d [mlir][Affine] Add nsw to lowering of AffineMulExpr. (#121535)
Since index operations have no set bitwidth, it is ill-defined to use
signed/unsigned wrapping behavior. The corollary to which is that it is
always safe to add nsw/nuw to lowering of affine ops.

Also add a folder to fold `div(s|u)i (mul (a, v), v) -> a`

Signed-off-by: MaheshRavishankar <mravisha@amd.com>
2025-01-06 14:57:24 -08:00
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