b2e76a5e7a
Avoid unnecessary spills of byval arguments of device functions to local space on SASS level and subsequent pointer conversion to generic address space that follows. Instead, make a local copy in IR, provide a way to access arguments directly, and let LLVM optimize the copy away when possible. Differential Review: https://reviews.llvm.org/D21421 llvm-svn: 276153
254 lines
9.0 KiB
C++
254 lines
9.0 KiB
C++
//===-- NVPTXLowerKernelArgs.cpp - Lower kernel arguments -----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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// Arguments to kernel and device functions are passed via param space,
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// which imposes certain restrictions:
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// http://docs.nvidia.com/cuda/parallel-thread-execution/#state-spaces
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//
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// Kernel parameters are read-only and accessible only via ld.param
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// instruction, directly or via a pointer. Pointers to kernel
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// arguments can't be converted to generic address space.
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//
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// Device function parameters are directly accessible via
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// ld.param/st.param, but taking the address of one returns a pointer
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// to a copy created in local space which *can't* be used with
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// ld.param/st.param.
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//
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// Copying a byval struct into local memory in IR allows us to enforce
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// the param space restrictions, gives the rest of IR a pointer w/o
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// param space restrictions, and gives us an opportunity to eliminate
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// the copy.
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//
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// Pointer arguments to kernel functions need more work to be lowered:
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//
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// 1. Convert non-byval pointer arguments of CUDA kernels to pointers in the
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// global address space. This allows later optimizations to emit
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// ld.global.*/st.global.* for accessing these pointer arguments. For
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// example,
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//
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// define void @foo(float* %input) {
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// %v = load float, float* %input, align 4
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// ...
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// }
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//
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// becomes
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//
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// define void @foo(float* %input) {
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// %input2 = addrspacecast float* %input to float addrspace(1)*
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// %input3 = addrspacecast float addrspace(1)* %input2 to float*
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// %v = load float, float* %input3, align 4
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// ...
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// }
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//
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// Later, NVPTXFavorNonGenericAddrSpaces will optimize it to
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//
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// define void @foo(float* %input) {
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// %input2 = addrspacecast float* %input to float addrspace(1)*
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// %v = load float, float addrspace(1)* %input2, align 4
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// ...
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// }
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//
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// 2. Convert pointers in a byval kernel parameter to pointers in the global
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// address space. As #2, it allows NVPTX to emit more ld/st.global. E.g.,
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//
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// struct S {
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// int *x;
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// int *y;
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// };
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// __global__ void foo(S s) {
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// int *b = s.y;
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// // use b
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// }
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//
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// "b" points to the global address space. In the IR level,
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//
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// define void @foo({i32*, i32*}* byval %input) {
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// %b_ptr = getelementptr {i32*, i32*}, {i32*, i32*}* %input, i64 0, i32 1
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// %b = load i32*, i32** %b_ptr
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// ; use %b
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// }
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//
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// becomes
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//
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// define void @foo({i32*, i32*}* byval %input) {
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// %b_ptr = getelementptr {i32*, i32*}, {i32*, i32*}* %input, i64 0, i32 1
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// %b = load i32*, i32** %b_ptr
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// %b_global = addrspacecast i32* %b to i32 addrspace(1)*
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// %b_generic = addrspacecast i32 addrspace(1)* %b_global to i32*
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// ; use %b_generic
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// }
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//
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// TODO: merge this pass with NVPTXFavorNonGenericAddrSpace so that other passes
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// don't cancel the addrspacecast pair this pass emits.
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//===----------------------------------------------------------------------===//
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#include "NVPTX.h"
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#include "NVPTXUtilities.h"
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#include "NVPTXTargetMachine.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Type.h"
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#include "llvm/Pass.h"
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using namespace llvm;
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namespace llvm {
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void initializeNVPTXLowerKernelArgsPass(PassRegistry &);
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}
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namespace {
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class NVPTXLowerKernelArgs : public FunctionPass {
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bool runOnFunction(Function &F) override;
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bool runOnKernelFunction(Function &F);
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bool runOnDeviceFunction(Function &F);
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// handle byval parameters
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void handleByValParam(Argument *Arg);
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// Knowing Ptr must point to the global address space, this function
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// addrspacecasts Ptr to global and then back to generic. This allows
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// NVPTXFavorNonGenericAddrSpace to fold the global-to-generic cast into
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// loads/stores that appear later.
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void markPointerAsGlobal(Value *Ptr);
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public:
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static char ID; // Pass identification, replacement for typeid
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NVPTXLowerKernelArgs(const NVPTXTargetMachine *TM = nullptr)
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: FunctionPass(ID), TM(TM) {}
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const char *getPassName() const override {
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return "Lower pointer arguments of CUDA kernels";
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}
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private:
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const NVPTXTargetMachine *TM;
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};
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} // namespace
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char NVPTXLowerKernelArgs::ID = 1;
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INITIALIZE_PASS(NVPTXLowerKernelArgs, "nvptx-lower-kernel-args",
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"Lower kernel arguments (NVPTX)", false, false)
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// =============================================================================
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// If the function had a byval struct ptr arg, say foo(%struct.x* byval %d),
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// then add the following instructions to the first basic block:
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//
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// %temp = alloca %struct.x, align 8
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// %tempd = addrspacecast %struct.x* %d to %struct.x addrspace(101)*
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// %tv = load %struct.x addrspace(101)* %tempd
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// store %struct.x %tv, %struct.x* %temp, align 8
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//
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// The above code allocates some space in the stack and copies the incoming
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// struct from param space to local space.
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// Then replace all occurrences of %d by %temp.
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// =============================================================================
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void NVPTXLowerKernelArgs::handleByValParam(Argument *Arg) {
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Function *Func = Arg->getParent();
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Instruction *FirstInst = &(Func->getEntryBlock().front());
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PointerType *PType = dyn_cast<PointerType>(Arg->getType());
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assert(PType && "Expecting pointer type in handleByValParam");
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Type *StructType = PType->getElementType();
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AllocaInst *AllocA = new AllocaInst(StructType, Arg->getName(), FirstInst);
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// Set the alignment to alignment of the byval parameter. This is because,
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// later load/stores assume that alignment, and we are going to replace
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// the use of the byval parameter with this alloca instruction.
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AllocA->setAlignment(Func->getParamAlignment(Arg->getArgNo() + 1));
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Arg->replaceAllUsesWith(AllocA);
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Value *ArgInParam = new AddrSpaceCastInst(
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Arg, PointerType::get(StructType, ADDRESS_SPACE_PARAM), Arg->getName(),
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FirstInst);
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LoadInst *LI = new LoadInst(ArgInParam, Arg->getName(), FirstInst);
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new StoreInst(LI, AllocA, FirstInst);
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}
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void NVPTXLowerKernelArgs::markPointerAsGlobal(Value *Ptr) {
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if (Ptr->getType()->getPointerAddressSpace() == ADDRESS_SPACE_GLOBAL)
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return;
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// Deciding where to emit the addrspacecast pair.
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BasicBlock::iterator InsertPt;
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if (Argument *Arg = dyn_cast<Argument>(Ptr)) {
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// Insert at the functon entry if Ptr is an argument.
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InsertPt = Arg->getParent()->getEntryBlock().begin();
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} else {
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// Insert right after Ptr if Ptr is an instruction.
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InsertPt = ++cast<Instruction>(Ptr)->getIterator();
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assert(InsertPt != InsertPt->getParent()->end() &&
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"We don't call this function with Ptr being a terminator.");
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}
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Instruction *PtrInGlobal = new AddrSpaceCastInst(
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Ptr, PointerType::get(Ptr->getType()->getPointerElementType(),
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ADDRESS_SPACE_GLOBAL),
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Ptr->getName(), &*InsertPt);
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Value *PtrInGeneric = new AddrSpaceCastInst(PtrInGlobal, Ptr->getType(),
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Ptr->getName(), &*InsertPt);
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// Replace with PtrInGeneric all uses of Ptr except PtrInGlobal.
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Ptr->replaceAllUsesWith(PtrInGeneric);
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PtrInGlobal->setOperand(0, Ptr);
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}
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// =============================================================================
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// Main function for this pass.
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// =============================================================================
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bool NVPTXLowerKernelArgs::runOnKernelFunction(Function &F) {
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if (TM && TM->getDrvInterface() == NVPTX::CUDA) {
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// Mark pointers in byval structs as global.
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for (auto &B : F) {
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for (auto &I : B) {
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if (LoadInst *LI = dyn_cast<LoadInst>(&I)) {
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if (LI->getType()->isPointerTy()) {
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Value *UO = GetUnderlyingObject(LI->getPointerOperand(),
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F.getParent()->getDataLayout());
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if (Argument *Arg = dyn_cast<Argument>(UO)) {
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if (Arg->hasByValAttr()) {
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// LI is a load from a pointer within a byval kernel parameter.
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markPointerAsGlobal(LI);
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}
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}
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}
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}
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}
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}
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}
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for (Argument &Arg : F.args()) {
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if (Arg.getType()->isPointerTy()) {
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if (Arg.hasByValAttr())
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handleByValParam(&Arg);
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else if (TM && TM->getDrvInterface() == NVPTX::CUDA)
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markPointerAsGlobal(&Arg);
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}
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}
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return true;
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}
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// Device functions only need to copy byval args into local memory.
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bool NVPTXLowerKernelArgs::runOnDeviceFunction(Function &F) {
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for (Argument &Arg : F.args())
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if (Arg.getType()->isPointerTy() && Arg.hasByValAttr())
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handleByValParam(&Arg);
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return true;
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}
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bool NVPTXLowerKernelArgs::runOnFunction(Function &F) {
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return isKernelFunction(F) ? runOnKernelFunction(F) : runOnDeviceFunction(F);
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}
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FunctionPass *
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llvm::createNVPTXLowerKernelArgsPass(const NVPTXTargetMachine *TM) {
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return new NVPTXLowerKernelArgs(TM);
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}
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