Ron Lieberman cac749ac88 [AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST ...

Add a pass to fixup various vector ISel issues.
Currently we handle converting GLOBAL_{LOAD|STORE}_*
and GLOBAL_Atomic_* instructions into their _SADDR variants.
This involves feeding the sreg into the saddr field of the new instruction.

llvm-svn: 347008

2018-11-16 01:13:34 +00:00

..

AMDGPUAsmUtils.cpp

[AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for s_getreg_b32

2018-01-15 18:49:15 +00:00

AMDGPUAsmUtils.h

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AMDGPUBaseInfo.cpp

[AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST

2018-11-16 01:13:34 +00:00

AMDGPUBaseInfo.h

Revert "AMDGPU: Divergence-driven selection of scalar buffer load intrinsics"

2018-11-07 21:53:43 +00:00

AMDKernelCodeTInfo.h

AMDGPU: Clear the bits before they are being set in program resource registers

2018-09-14 20:00:36 +00:00

AMDKernelCodeTUtils.cpp

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AMDKernelCodeTUtils.h

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CMakeLists.txt

AMDGPU: Rewrite SILowerI1Copies to always stay on SALU

2018-10-31 13:27:08 +00:00

LLVMBuild.txt

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