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4557ffeb630eb59cd124a0df05e12a0a4cb82003
clang-p2996/llvm/test/Transforms/LoopVectorize/PowerPC
History
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agg-interleave-a2.ll
[PowerPC] Always use aggressive interleaving on the A2
2015-09-03 23:23:00 +00:00
large-loop-rdx.ll
Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.
2016-02-26 19:40:34 +00:00
lit.local.cfg
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pr30990.ll
[ppc] Correctly compute the cost of loading 32/64 bit memory into VSR
2016-12-03 00:41:43 +00:00
small-loop-rdx.ll
[LV] Scalarize instructions marked scalar after vectorization
2016-09-26 17:08:37 +00:00
stride-vectorization.ll
[LV] Fix PR26600: avoid out of bounds loads for interleaved access vectorization
2016-02-19 15:46:10 +00:00
vectorize-only-for-real.ll
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vsx-tsvc-s173.ll
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