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Simon Pilgrim a015635629 [Hexagon] Add support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns 
This should handle the basic integer min/max handling - the HVX ops are still TODO.

This is some necessary cleanup work for min/max ops to eventually help us move the add/sub sat patterns into DAGCombine - D91876.

Differential Revision: https://reviews.llvm.org/D92112
2020-11-25 19:02:17 +00:00
..
autohvx
[Hexagon] Handle additional shuffles that can be made perfect
2020-10-29 19:09:00 -05:00
intrinsics
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loop-idiom
[Hexagon][NewPM] Port -hexagon-loop-idiom and add to pipeline
2020-11-20 09:34:37 -08:00
pipeliner
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vect
[Hexagon] Replace HexagonISD::VSPLAT with ISD::SPLAT_VECTOR
2020-10-10 19:49:47 -05:00
64bit_tstbit.ll
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abi-padding-2.ll
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abi-padding.ll
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abs.ll
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absimm.ll
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addh.ll
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align_Os.ll
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align_test.ll
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alu64.ll
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always-ext.ll
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anti-dep-partial.mir
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args.ll
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asr-rnd64.ll
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asr-rnd.ll
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assert-postinc-ptr-not-value.ll
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atomic-rmw-add.ll
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atomic-store-byte.ll
Align store conditional address
2020-07-30 10:42:00 -05:00
Atomics.ll
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avoid-predspill-calleesaved.ll
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avoid-predspill.ll
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avoidVectorLowering.ll
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bank-conflict-load.mir
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barrier-flag.ll
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base-offset-post.ll
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base-offset-stv4.ll
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bit-addr-align.mir
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bit-bitsplit-at.ll
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bit-bitsplit-regclass.ll
[Hexagon] Use InstSimplify instead of ConstantProp
2020-08-04 15:42:39 -07:00
bit-bitsplit-src.ll
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bit-bitsplit.ll
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bit-cmp0.mir
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bit-eval.ll
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bit-extract-off.ll
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bit-extract.ll
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bit-gen-rseq.ll
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bit-has.ll
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bit-loop-rc-mismatch.ll
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bit-loop.ll
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bit-phi.ll
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bit-rie.ll
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bit-skip-byval.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
bit-validate-reg.ll
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bit-visit-flowq.ll
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bitmanip.ll
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branch-folder-hoist-kills.mir
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brev_ld.ll
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bug6757-endloop.ll
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bug9049.ll
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bug15515-shuffle.ll
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bug-aa4463-ifconv-vecpred.ll
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build-vector-shuffle.ll
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builtin-prefetch.ll
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call-long1.ll
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call-ret-i1.ll
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call-v4.ll
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calling-conv-2.ll
OpaquePtr: Update more tests to use typed sret
2020-11-20 20:08:43 -05:00
calling-conv.ll
OpaquePtr: Update more tests to use typed sret
2020-11-20 20:08:43 -05:00
callR_noreturn.ll
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cext-opt-basic.mir
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cext-opt-negative-fi.mir
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
cext-opt-numops.mir
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expand-condsets-pred-undef2.ll
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expand-condsets-pred-undef.ll
OpaquePtr: Update more tests to use typed sret
2020-11-20 20:08:43 -05:00
expand-condsets-rm-reg.mir
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extload-combine.ll
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extract-basic.ll
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extractu_0bits.ll
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fadd.ll
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fcmp.ll
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feature-compound.ll
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feature-memops.ll
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find-loop-instr.ll
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find-loop.ll
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float-amode.ll
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float-const64-G0.ll
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float-gen-cmpop.ll
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float.ll
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floatconvert-ieee-rnd-near.ll
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fltnvjump.ll
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fmadd.ll
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fminmax.ll
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fmul-v67.ll
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fp_latency.ll
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fpelim-basic.ll
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frame-offset-overflow.ll
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fsel.ll
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fsub.ll
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funnel-shift2.ll
[Hexagon] Correct the order of operands when lowering funnel shift-left
2020-07-28 21:22:41 -05:00
funnel-shift.ll
[Hexagon] Correct the order of operands when lowering funnel shift-left
2020-07-28 21:22:41 -05:00
fusedandshift.ll
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generic-cpu.ll
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getBlockAddress.ll
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glob-align-volatile.ll
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global64bitbug.ll
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global-const-gep.ll
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global-ctor-pcrel.ll
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gp-plus-offset-load.ll
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gp-plus-offset-store.ll
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gp-rel.ll
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Halide_vec_cast_trunc1.ll
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Halide_vec_cast_trunc2.ll
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hasfp-crash1.ll
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hasfp-crash2.ll
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hello-world-v55.ll
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hello-world-v60.ll
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hexagon_cfi_offset.ll
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hexagon_vector_loop_carried_reuse_commutative.ll
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hexagon_vector_loop_carried_reuse_constant.ll
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hexagon_vector_loop_carried_reuse_invalid.ll
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hexagon_vector_loop_carried_reuse.ll
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hexagon-cond-jumpr31.ll
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hexagon-verify-implicit-use.ll
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hidden-relocation.ll
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honor-optsize.ll
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hrc-stack-coloring.ll
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hvx-bitcast-v64i1.ll
[Hexagon] Implement llvm.masked.load and llvm.masked.store for HVX
2020-08-26 13:10:22 -05:00
hvx-byte-store-double.ll
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hvx-byte-store.ll
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hvx-dbl-dual-output.ll
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hvx-double-vzero.ll
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hvx-dual-output.ll
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hvx-isel-vselect-v256i16.ll
[Hexagon] Check if EVT is simple type in HVX lowering
2020-08-25 15:02:44 -05:00
hvx-loopidiom-memcpy.ll
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hvx-nontemporal.ll
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hvx-vzero.ll
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hwloop-redef-imm.mir
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inline-asm-a.ll
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inline-asm-clobber-lr.ll
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inline-asm-error.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
inline-asm-filetype-null.ll
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inline-asm-hexagon.ll
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inline-asm-vecpred128.ll
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inlineasm-output-template.ll
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insert4.ll
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insert-basic.ll
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insert.ll
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intrinsics-v60-alu.ll
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intrinsics-v66.ll
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isel-combine-half.ll
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isel-dcfetch-intrin-map.ll
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isel-exti1.ll
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isel-global-offset-alignment.ll
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isel-hvx-pred-bitcast-order.ll
[Hexagon] Fix perfect shuffle generation for single vectors
2020-08-30 06:43:16 -05:00
isel-i1arg-crash.ll
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isel-minmax-v64bit.ll
[Hexagon] Add support for ISD::SMAX/SMIN/UMAX/UMIN instead of custom dag patterns
2020-11-25 19:02:17 +00:00
isel-op-zext-i1.ll
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isel-prefer.ll
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isel-select-v4i8.ll
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isel-setcc-i1.ll
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isel-simplify-crash.ll
[Hexagon] Use InstSimplify instead of ConstantProp
2020-08-04 15:42:39 -07:00
isel-splat-vector-crash.ll
[Hexagon] Replace HexagonISD::VSPLAT with ISD::SPLAT_VECTOR
2020-10-10 19:49:47 -05:00
isel-splat-vector-dag-crash.ll
[Hexagon] Replace HexagonISD::VSPLAT with ISD::SPLAT_VECTOR
2020-10-10 19:49:47 -05:00
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isel-vlsr-v2i16.ll
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lit.local.cfg
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local-exec.ll
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long-calls.ll
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loop_correctness.ll
[Hexagon] Use InstSimplify instead of ConstantProp
2020-08-04 15:42:39 -07:00
loop-prefetch.ll
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mpy.ll
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mul64.ll
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mux-basic.ll
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mux-undef.ll
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muxii-bug.ll
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muxii-crash.ll
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namedreg.ll
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neg.ll
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newify-crash.ll
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newvaluejump2.ll
Revert "[BPI] Improve static heuristics for integer comparisons"
2020-08-17 20:44:33 +02:00
newvaluejump3.ll
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newvaluejump-c4.mir
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newvaluejump-float.mir
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newvaluejump-kill2.mir
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newvaluejump-kill.ll
[Hexagon] Use InstSimplify instead of ConstantProp
2020-08-04 15:42:39 -07:00
newvaluejump-postinc.ll
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newvaluejump-solo.mir
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newvaluejump.ll
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newvalueSameReg.ll
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not-op.ll
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ntstbit.ll
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NVJumpCmp.ll
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opt-addr-mode-subreg-use.ll
OpaquePtr: Update more tests to use typed sret
2020-11-20 20:08:43 -05:00
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packetize-dccleana.mir
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packetize-debug-loc.mir
…
packetize-frame-setup-destroy.mir
…
packetize-impdef-1.ll
[Hexagon] Use InstSimplify instead of ConstantProp
2020-08-04 15:42:39 -07:00
packetize-impdef.ll
…
packetize-l2fetch.ll
…
packetize-load-store-aliasing.mir
…
packetize-nvj-no-prune.mir
…
packetize-nvstore.mir
…
packetize-return-arg.ll
…
packetize-tailcall-arg.ll
…
packetize-update-offset.mir
…
packetize-vgather-slot01.mir
…
packetize-volatiles.ll
…
packetizer-resources.ll
…
partword-cmpxchg.ll
…
peephole-kill-flags.ll
…
peephole-move-phi.ll
…
peephole-op-swap.ll
…
phi-elim.ll
…
pic-jt-big.ll
…
pic-jumptables.ll
…
pic-local.ll
…
pic-regusage.ll
…
pic-sdata.ll
…
pic-simple.ll
…
pic-static.ll
…
plt-rel.ll
…
pmpyw_acc.ll
…
post-inc-aa-metadata.ll
…
post-ra-kill-update.mir
…
postinc-aggr-dag-cycle.ll
…
postinc-baseoffset.mir
…
postinc-float.ll
…
postinc-load.ll
…
postinc-offset.ll
…
postinc-order.ll
…
postinc-store.ll
…
postra-sink-subregs.mir
…
PR33749.ll
…
pred-absolute-store.ll
…
pred-gp.ll
…
pred-instrs.ll
…
pred-sched.ll
…
pred-simp.ll
…
pred-taken-jump.ll
…
predicate-copy.ll
…
predicate-logical.ll
…
predicate-rcmp.ll
…
predtfrs.ll
…
prefetch-intr.ll
…
prefetch-shuffler-ice.ll
…
prob-types.ll
…
prof-early-if.ll
…
propagate-vcombine.ll
…
ps_call_nr.ll
…
rdf-copy-renamable-reserved.mir
…
rdf-copy-undef2.ll
…
rdf-copy-undef.ll
…
rdf-copy.ll
…
rdf-cover-use.ll
…
rdf-dead-loop.ll
…
rdf-def-mask.ll
…
rdf-ehlabel-live.mir
…
rdf-extra-livein.ll
…
rdf-filter-defs.ll
…
rdf-ignore-undef.ll
…
rdf-inline-asm-fixed.ll
…
rdf-inline-asm.ll
…
rdf-kill-last-op.ll
…
rdf-multiple-phis-up.ll
…
rdf-phi-shadows.ll
…
rdf-phi-up.ll
…
rdf-reset-kills.ll
…
readcyclecounter.ll
…
redundant-branching2.ll
…
reg_seq.ll
…
reg-by-name.ll
…
reg-eq-cmp.ll
…
reg-scav-imp-use-dbl-vec.ll
…
reg-scavengebug-2.ll
…
reg-scavengebug-3.ll
…
reg-scavengebug-4.ll
…
reg-scavengebug-5.ll
…
reg-scavengebug.ll
…
reg-scavenger-valid-slot.ll
…
regalloc-bad-undef.mir
…
regalloc-block-overlap.ll
…
regalloc-coal-extend-short-subrange.mir
…
regalloc-coal-fullreg-undef.mir
…
regalloc-liveout-undef.mir
…
registerpassbuildercallbacks.ll
[NPM] Add target specific hook to add passes for New Pass Manager
2020-09-30 13:29:43 -07:00
registerscav-missing-spill-slot.ll
…
registerscavenger-fail1.ll
…
regp-underflow.ll
…
regscav-wrong-super-sub-regs.ll
…
regscavenger_fail_hwloop.ll
…
regscavengerbug.ll
OpaquePtr: Update more tests to use typed sret
2020-11-20 20:08:43 -05:00
relax.ll
…
remove_lsr.ll
…
remove-endloop.ll
…
restore-single-reg.ll
…
ret-struct-by-val.ll
…
retval-redundant-copy.ll
…
rotate-multi.ll
…
rotate.ll
…
rotl-i64.ll
…
runtime-stkchk.ll
…
S3_2op.ll
…
save-kill-csr.ll
…
save-regs-thresh.ll
…
sdata-array.ll
…
sdata-basic.ll
…
sdata-expand-const.ll
…
sdata-explicit-section.ll
…
sdata-load-size.ll
…
sdata-opaque-type.ll
…
sdata-stack-guard.ll
…
sdiv-minsigned.ll
…
sdr-basic.ll
…
sdr-global.mir
…
sdr-nosplit1.ll
…
sdr-reg-profit.ll
…
sdr-shr32.ll
…
section_7275.ll
…
select-instr-align.ll
…
setmemrefs.ll
…
sf-min-max.ll
…
sffms.ll
…
sfmin_dce.ll
…
sfmpyacc_scale.ll
…
shrink-frame-basic.ll
…
signed_immediates.ll
…
signext-inreg.ll
…
simple_addend.ll
…
simpletailcall.ll
…
simplify64bitops_7223.ll
…
spill-vector-alignment.mir
…
split-const32-const64.ll
…
split-muxii.ll
…
split-vecpred.ll
…
stack-align1.ll
…
stack-align2.ll
…
stack-align-reset.ll
…
stack-alloca1.ll
…
stack-alloca2.ll
…
stack-guard-acceptable-type.ll
…
static.ll
…
store1.ll
…
store_abs.ll
…
store-abs.ll
…
store-AbsSet.ll
[Hexagon] Add more lit tests
2018-03-12 14:01:28 +00:00
store-constant.ll
…
store-imm-amode.ll
…
store-imm-byte.ll
…
store-imm-halword.ll
…
store-imm-large-stack.ll
…
store-imm-stack-object.ll
…
store-imm-word.ll
…
store-shift.ll
…
store-vector-pred.ll
[Hexagon] Implement llvm.masked.load and llvm.masked.store for HVX
2020-08-26 13:10:22 -05:00
store-widen-aliased-load.ll
…
store-widen-negv2.ll
…
store-widen-negv.ll
…
store-widen-subreg.ll
…
store-widen.ll
…
storerd-io-over-rr.ll
…
storerinewabs.ll
…
struct_args_large.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
struct_args.ll
…
struct_copy_sched_r16.ll
…
struct_copy.ll
…
struct-const.ll
…
sub-add.ll
…
subh-shifted.ll
…
subh.ll
…
subi-asl.ll
…
SUnit-boundary-prob.ll
…
switch-lut-explicit-section.ll
…
switch-lut-function-section.ll
…
switch-lut-multiple-functions.ll
…
switch-lut-text-section.ll
…
swp-art-deps-rec.ll
…
swp-bad-sched.ll
…
swp-badorder.ll
…
swp-carried-1.ll
…
swp-carried-dep1.mir
…
swp-carried-dep2.mir
…
swp-chain-refs.ll
…
swp-change-dep1.ll
…
swp-change-dep-cycle.ll
…
swp-change-dep.ll
…
swp-change-deps.ll
…
swp-check-offset.ll
…
swp-const-tc1.ll
…
swp-const-tc2.ll
…
swp-const-tc3.ll
…
swp-const-tc.ll
…
swp-conv3x3-nested.ll
…
swp-copytophi-dag.ll
…
swp-crash-iter.ll
…
swp-cse-phi.ll
…
swp-dag-phi1.ll
…
swp-dag-phi.ll
…
swp-dead-regseq.ll
…
swp-dep-neg-offset.ll
…
swp-disable-Os.ll
…
swp-epilog-numphis.ll
…
swp-epilog-phi2.ll
…
swp-epilog-phi4.ll
…
swp-epilog-phi5.ll
…
swp-epilog-phi6.ll
…
swp-epilog-phi7.ll
…
swp-epilog-phi8.ll
…
swp-epilog-phi9.ll
…
swp-epilog-phi10.ll
…
swp-epilog-phi11.ll
…
swp-epilog-phi12.ll
…
swp-epilog-phi13.ll
…
swp-epilog-reuse2.ll
…
swp-epilog-reuse3.ll
…
swp-epilog-reuse4.ll
…
swp-epilog-reuse-1.ll
…
swp-epilog-reuse.ll
…
swp-exit-fixup.ll
…
swp-fix-last-use1.ll
…
swp-fix-last-use.ll
…
swp-intreglow8.ll
…
swp-kernel-last-use.ll
…
swp-kernel-phi1.ll
…
swp-large-rec.ll
…
swp-listen-loop3.ll
…
swp-loop-carried-crash.ll
…
swp-loop-carried-unknown.ll
…
swp-loop-carried.ll
…
swp-loopval.ll
…
swp-lots-deps.ll
…
swp-matmul-bitext.ll
…
swp-max-stage3.ll
…
swp-max.ll
…
swp-maxstart.ll
…
swp-memrefs-epilog.ll
…
swp-more-phi.ll
…
swp-multi-loops.ll
…
swp-multi-phi-refs.ll
…
swp-new-phi.ll
…
swp-node-order.ll
…
swp-order1.ll
…
swp-order-carried.ll
…
swp-order-copies.ll
…
swp-order-deps1.ll
…
swp-order-deps3.ll
…
swp-order-deps4.ll
…
swp-order-deps5.ll
…
swp-order-deps6.ll
…
swp-order-deps7.ll
…
swp-order-prec.ll
…
swp-order.ll
…
swp-phi-ch-offset.ll
…
swp-phi-chains.ll
…
swp-phi-def-use.ll
…
swp-phi-dep1.ll
…
swp-phi-dep.ll
…
swp-phi-order.ll
…
swp-phi-ref1.ll
…
swp-phi-ref.ll
…
swp-phi-start.ll
…
swp-phi.ll
…
swp-physreg.ll
…
swp-pragma-disable-bug.ll
…
swp-pragma-disable.ii
…
swp-pragma-initiation-interval-reset.ii
[MachinePipeliner] Fix II_setByPragma initialization
2020-09-09 13:38:35 +00:00
swp-pragma-initiation-interval.ii
…
swp-prolog-phi4.ll
…
swp-prolog-phi.ll
…
swp-regseq.ll
…
swp-remove-dep-ice.ll
…
swp-rename-dead-phi.ll
…
swp-rename.ll
…
swp-replace-uses1.ll
…
swp-resmii-1.ll
…
swp-resmii.ll
…
swp-reuse-phi-1.ll
…
swp-reuse-phi-2.ll
…
swp-reuse-phi-4.ll
…
swp-reuse-phi-5.ll
…
swp-reuse-phi-6.ll
…
swp-reuse-phi.ll
…
swp-sigma.ll
…
swp-stages3.ll
…
swp-stages4.ll
…
swp-stages5.ll
…
swp-stages.ll
…
swp-subreg.ll
…
swp-swap.ll
…
swp-tfri.ll
…
swp-vect-dotprod.ll
…
swp-vmult.ll
…
swp-vsum.ll
…
swp-xxh2.ll
…
tail-call-mem-intrinsics.ll
…
tail-call-trunc.ll
…
tail-dup-subreg-abort.ll
…
tail-dup-subreg-map.ll
OpaquePtr: Bulk update tests to use typed sret
2020-11-20 17:58:26 -05:00
tailcall_fastcc_ccc.ll
…
target-flag-ext.mir
…
tc_duplex_asm.ll
…
tc_duplex.ll
…
tc_sched1.ll
…
tc_sched.ll
…
tcm-zext.ll
…
testbits.ll
…
tfr-cleanup.ll
…
tfr-mux-nvj.ll
…
tfr-to-combine.ll
…
tied_oper.ll
…
tiny_bkfir_artdeps.ll
…
tiny_bkfir_loop_align.ll
…
tinycore.ll
…
tls_gd.ll
…
tls_pic.ll
…
tls_static.ll
…
trap-crash.ll
…
trap-unreachable.ll
…
trivialmemaliascheck.ll
…
trunc-mpy.ll
…
tstbit.ll
…
two-addr-tied-subregs.mir
…
two-crash.ll
…
twoaddressbug.ll
…
undef-ret.ll
…
undo-dag-shift.ll
…
union-1.ll
…
unordered-fcmp.ll
…
unreachable-mbb-phi-subreg.mir
…
upper-mpy.ll
…
usr-ovf-dep.ll
…
v5_insns.ll
…
v6-inlasm1.ll
…
v6-inlasm2.ll
…
v6-inlasm3.ll
…
v6-inlasm4.ll
…
v6-shuffl.ll
…
v6-spill1.ll
…
v6-unaligned-spill.ll
…
v6-vecpred-copy.ll
…
v6vassignp.ll
…
v6vec_inc1.ll
…
v6vec_zero.ll
[Hexagon] Add more lit tests
2018-03-12 14:01:28 +00:00
v6vec-vmemcur-prob.mir
…
v6vec-vmemu1.ll
…
v6vec-vmemu2.ll
…
v6vec-vprint.ll
…
v6vec-vshuff.ll
…
v6vect-dbl-fail1.ll
…
v6vect-dbl-spill.ll
…
v6vect-dbl.ll
…
v6vect-dh1.ll
…
v6vect-locals1.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
v6vect-no-sideeffects.ll
…
v6vect-pred2.ll
…
v6vect-spill-kill.ll
…
v6vect-vmem1.ll
…
v6vect-vsplat.ll
…
v60_Q6_P_rol_PI.ll
…
v60_sort16.ll
…
v60-align.ll
…
v60-cur.ll
…
v60-haar-postinc.ll
…
v60-halide-vcombinei8.ll
…
v60-vec-128b-1.ll
…
v60-vecpred-spill.ll
…
v60-vsel1.ll
…
v60-vsel2.ll
…
v60Intrins.ll
…
v60rol-instrs.ll
…
v60small.ll
…
v60Vasr.ll
…
v62-CJAllSlots.ll
…
v62-inlasm4.ll
…
V60-VDblNew.ll
…
vacopy.ll
…
vadd1.ll
…
vaddh.ll
…
validate-offset.ll
…
vararg_align_check.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
vararg_double_onstack.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
vararg_named.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
vararg-deallocate-sp.ll
…
vararg-formal.ll
…
vararg-linux-abi.ll
…
vararg.ll
OpaquePtr: Bulk update tests to use typed byval
2020-11-20 14:00:46 -05:00
varargs-memv.ll
…
vassign-to-combine.ll
…
vcombine128_to_req_seq.ll
…
vcombine_subreg.ll
…
vcombine_to_req_seq.ll
…
vdmpy-halide-test.ll
…
vdotprod.ll
…
vec-align.ll
…
vec-call-full1.ll
…
vec-pred-spill1.ll
…
vec-vararg-align.ll
…
vecPred2Vec.ll
…
vect_setcc_v2i16.ll
…
vect_setcc.ll
…
vect-any_extend.ll
…
vect-dbl-post-inc.ll
…
vect-downscale.ll
…
vect-regpairs.ll
…
vect-set_cc_v2i32.ll
…
vect-vd0.ll
…
vect-zero_extend.ll
…
vector-align.ll
…
vector-ext-load.ll
[Hexagon] Expand sext- and zextloads of vector types, not just extloads
2016-09-08 17:42:14 +00:00
verify-liveness-at-def.mir
…
verify-sink-code.ll
…
verify-undef.ll
…
vextract-basic.mir
…
vgather-packetize.mir
…
vload-postinc-sel.ll
…
vmemu-128.ll
…
vmpa-halide-test.ll
…
vpack_eo.ll
…
vrcmpys.ll
…
vselect-pseudo.ll
…
vsplat-ext.ll
…
vsplat-isel.ll
…
wcsrtomb.ll
…
zextloadi1.ll
…