be7d425edc
This patch is the initial patch for support of the AIX extended vector ABI. The extended ABI treats vector registers V20-V31 as non-volatile and we add them as callee saved registers in this patch. Reviewed By: sfertile Differential Revision: https://reviews.llvm.org/D88676
47 lines
1.6 KiB
LLVM
47 lines
1.6 KiB
LLVM
; This test tries to verify if a csect containing code would have the correct alignment.
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; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
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; RUN: llvm-readobj --syms %t.o | FileCheck --check-prefix=SYMS %s
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; RUN: not --crash llc -mtriple powerpc64-ibm-aix-xcoff -filetype=obj < %s 2>&1 | \
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; RUN: FileCheck --check-prefix=XCOFF64 %s
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; XCOFF64: LLVM ERROR: 64-bit XCOFF object files are not supported yet.
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define i32 @foo() align 32 {
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entry:
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ret i32 0
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}
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define i32 @bar() align 64 {
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entry:
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ret i32 0
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}
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; CHECK: .csect .text[PR],6
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; CHECK-NEXT: .foo:
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; CHECK: .csect .text[PR],6
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; CHECK-NEXT: .bar:
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; SYMS: Symbol {{[{][[:space:]] *}}Index: [[#INDX:]]{{[[:space:]] *}}Name: .text
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; SYMS-NEXT: Value (RelocatableAddress): 0x0
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; SYMS-NEXT: Section: .text
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; SYMS-NEXT: Type: 0x0
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; SYMS-NEXT: StorageClass: C_HIDEXT (0x6B)
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; SYMS-NEXT: NumberOfAuxEntries: 1
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; SYMS-NEXT: CSECT Auxiliary Entry {
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; SYMS-NEXT: Index: [[#INDX+1]]
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; SYMS-NEXT: SectionLen: 72
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; SYMS-NEXT: ParameterHashIndex: 0x0
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; SYMS-NEXT: TypeChkSectNum: 0x0
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; SYMS-NEXT: SymbolAlignmentLog2: 6
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; SYMS-NEXT: SymbolType: XTY_SD (0x1)
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; SYMS-NEXT: StorageMappingClass: XMC_PR (0x0)
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; SYMS-NEXT: StabInfoIndex: 0x0
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; SYMS-NEXT: StabSectNum: 0x0
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; SYMS-NEXT: }
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; SYMS-NEXT: }
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