Local values are constants or addresses that can't be folded into the instruction that uses them. FastISel materializes these in a "local value" area that always dominates the current insertion point, to try to avoid materializing these values more than once (per block). https://reviews.llvm.org/D43093 added code to sink these local value instructions to their first use, which has two beneficial effects. One, it is likely to avoid some unnecessary spills and reloads; two, it allows us to attach the debug location of the user to the local value instruction. The latter effect can improve the debugging experience for debuggers with a "set next statement" feature, such as the Visual Studio debugger and PS4 debugger, because instructions to set up constants for a given statement will be associated with the appropriate source line. There are also some constants (primarily addresses) that could be produced by no-op casts or GEP instructions; the main difference from "local value" instructions is that these are values from separate IR instructions, and therefore could have multiple users across multiple basic blocks. D43093 avoided sinking these, even though they were emitted to the same "local value" area as the other instructions. The patch comment for D43093 states: Local values may also be used by no-op casts, which adds the register to the RegFixups table. Without reversing the RegFixups map direction, we don't have enough information to sink these instructions. This patch undoes most of D43093, and instead flushes the local value map after(*) every IR instruction, using that instruction's debug location. This avoids sometimes incorrect locations used previously, and emits instructions in a more natural order. This does mean materialized values are not re-used across IR instruction boundaries; however, only about 5% of those values were reused in an experimental self-build of clang. (*) Actually, just prior to the next instruction. It seems like it would be cleaner the other way, but I was having trouble getting that to work. Differential Revision: https://reviews.llvm.org/D91734
221 lines
4.8 KiB
LLVM
221 lines
4.8 KiB
LLVM
; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=-vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=ELF64
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; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=+vsx -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s --check-prefix=VSX
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; RUN: llc -relocation-model=static < %s -O0 -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=spe -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 | FileCheck %s --check-prefix=SPE
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; This test verifies that load/store instructions are properly generated,
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; and that they pass MI verification.
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@a = global i8 1, align 1
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@b = global i16 2, align 2
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@c = global i32 4, align 4
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@d = global i64 8, align 8
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@e = global float 1.25, align 4
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@f = global double 3.5, align 8
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%struct.s = type<{ i8, i32 }>
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%struct.t = type<{ i8, i64 }>
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@g = global %struct.s <{ i8 1, i32 2 }>, align 1
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@h = global %struct.t <{ i8 1, i64 2 }>, align 1
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@i = common global [8192 x i64] zeroinitializer, align 8
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; load
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define i8 @t1() nounwind {
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; ELF64-LABEL: t1:
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%1 = load i8, i8* @a, align 1
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; ELF64: lbz
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%2 = add nsw i8 %1, 1
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; ELF64: addi
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ret i8 %2
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}
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define i16 @t2() nounwind {
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; ELF64-LABEL: t2:
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%1 = load i16, i16* @b, align 2
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; ELF64: lhz
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%2 = add nsw i16 %1, 1
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; ELF64: addi
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ret i16 %2
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}
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define i32 @t3() nounwind {
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; ELF64-LABEL: t3:
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%1 = load i32, i32* @c, align 4
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; ELF64: lwz
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%2 = add nsw i32 %1, 1
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; ELF64: addi
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ret i32 %2
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}
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define i64 @t4() nounwind {
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; ELF64-LABEL: t4:
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%1 = load i64, i64* @d, align 4
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; ELF64: ld
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%2 = add nsw i64 %1, 1
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; ELF64: addi
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ret i64 %2
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}
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define float @t5() nounwind {
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; ELF64-LABEL: t5:
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; SPE-LABEL: t5:
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%1 = load float, float* @e, align 4
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; ELF64: lfs
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; SPE: lwz
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%2 = fadd float %1, 1.0
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; ELF64: fadds
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; SPE: efsadd
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ret float %2
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}
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define double @t6() nounwind {
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; ELF64-LABEL: t6:
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; SPE-LABEL: t6:
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%1 = load double, double* @f, align 8
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; ELF64: lfd
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; VSX: lxsdx
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; SPE: evldd
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%2 = fadd double %1, 1.0
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; ELF64: fadd
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; VSX: xsadddp
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; SPE: efdadd
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ret double %2
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}
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; store
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define void @t7(i8 %v) nounwind {
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; ELF64-LABEL: t7:
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%1 = add nsw i8 %v, 1
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store i8 %1, i8* @a, align 1
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; ELF64: addi
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; ELF64: addis
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; ELF64: addi
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; ELF64: stb
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ret void
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}
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define void @t8(i16 %v) nounwind {
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; ELF64-LABEL: t8:
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%1 = add nsw i16 %v, 1
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store i16 %1, i16* @b, align 2
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; ELF64: addi
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; ELF64: addis
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; ELF64: addi
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; ELF64: sth
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ret void
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}
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define void @t9(i32 %v) nounwind {
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; ELF64-LABEL: t9:
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%1 = add nsw i32 %v, 1
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store i32 %1, i32* @c, align 4
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; ELF64: addi
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; ELF64: addis
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; ELF64: addi
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; ELF64: stw
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ret void
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}
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define void @t10(i64 %v) nounwind {
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; ELF64-LABEL: t10:
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%1 = add nsw i64 %v, 1
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store i64 %1, i64* @d, align 4
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; ELF64: addi
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; ELF64: addis
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; ELF64: addi
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; ELF64: std
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ret void
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}
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define void @t11(float %v) nounwind {
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; ELF64-LABEL: t11:
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; SPE: t11:
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%1 = fadd float %v, 1.0
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store float %1, float* @e, align 4
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; ELF64: fadds
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; ELF64: stfs
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; SPE: efsadd
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; SPE: stw
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ret void
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}
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define void @t12(double %v) nounwind {
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; ELF64-LABEL: t12:
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; SPE-LABEL: t12:
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%1 = fadd double %v, 1.0
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store double %1, double* @f, align 8
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; ELF64: fadd
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; ELF64: stfd
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; VSX: xsadddp
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; VSX: stxsdx
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; SPE: efdadd
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; SPE: evstdd
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ret void
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}
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;; lwa requires an offset divisible by 4, so we need lwax here.
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define i64 @t13() nounwind {
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; ELF64-LABEL: t13:
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%1 = load i32, i32* getelementptr inbounds (%struct.s, %struct.s* @g, i32 0, i32 1), align 1
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%2 = sext i32 %1 to i64
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; ELF64: li
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; ELF64: lwax
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%3 = add nsw i64 %2, 1
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; ELF64: addi
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ret i64 %3
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}
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;; ld requires an offset divisible by 4, so we need ldx here.
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define i64 @t14() nounwind {
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; ELF64-LABEL: t14:
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%1 = load i64, i64* getelementptr inbounds (%struct.t, %struct.t* @h, i32 0, i32 1), align 1
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; ELF64: li
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; ELF64: ldx
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%2 = add nsw i64 %1, 1
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; ELF64: addi
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ret i64 %2
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}
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;; std requires an offset divisible by 4, so we need stdx here.
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define void @t15(i64 %v) nounwind {
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; ELF64-LABEL: t15:
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%1 = add nsw i64 %v, 1
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store i64 %1, i64* getelementptr inbounds (%struct.t, %struct.t* @h, i32 0, i32 1), align 1
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; ELF64: addi
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; ELF64: addis
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; ELF64: addi
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; ELF64: li
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; ELF64: stdx
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ret void
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}
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;; ld requires an offset that fits in 16 bits, so we need ldx here.
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define i64 @t16() nounwind {
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; ELF64-LABEL: t16:
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%1 = load i64, i64* getelementptr inbounds ([8192 x i64], [8192 x i64]* @i, i32 0, i64 5000), align 8
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; ELF64: lis
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; ELF64: ori
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; ELF64: ldx
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%2 = add nsw i64 %1, 1
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; ELF64: addi
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ret i64 %2
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}
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;; std requires an offset that fits in 16 bits, so we need stdx here.
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define void @t17(i64 %v) nounwind {
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; ELF64-LABEL: t17:
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%1 = add nsw i64 %v, 1
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store i64 %1, i64* getelementptr inbounds ([8192 x i64], [8192 x i64]* @i, i32 0, i64 5000), align 8
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; ELF64: addi
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; ELF64: addis
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; ELF64: addi
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; ELF64: lis
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; ELF64: ori
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; ELF64: stdx
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ret void
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}
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