Eugene Zhulenev f2df67e2a6 [mlir] Fix async microbench integration test ...

Differential Revision: https://reviews.llvm.org/D91912

2020-11-21 07:02:24 -08:00

..

Async/CPU

[mlir] Fix async microbench integration test

2020-11-21 07:02:24 -08:00

Linalg/CPU

[MLIR] Fix up integration tests after b7382ed3fe

2020-11-17 15:42:45 +01:00

LLVMIR/CPU

[llvm][mlir] Promote the experimental reduction intrinsics to be first class intrinsics.

2020-10-07 10:36:44 -07:00

Standard/CPU

[mlir][std] Add ExpandOps pass.

2020-11-09 21:58:28 +01:00

Vector/CPU

[MLIR] Extend Symbol verification to reject public symbol declarations.

2020-11-16 16:05:32 -08:00