475cd8dfaf
This change continues rewriting and cleanup around DAG ISel for formal-arguments, return values, and function calls. This causes some incidental changes, mostly to instruction ordering and register naming but also a couple improvements caused by using scalar types earlier in the lowering.
216 lines
7.0 KiB
LLVM
216 lines
7.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_35 -verify-machineinstrs | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_35 | %ptxas-verify %}
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target triple = "nvptx64-nvidia-cuda"
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define i16 @test_v2i8(i16 %a) {
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; CHECK-LABEL: test_v2i8(
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; CHECK: {
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; CHECK-NEXT: .reg .b16 %rs<5>;
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; CHECK-NEXT: .reg .b32 %r<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b16 %rs1, [test_v2i8_param_0];
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; CHECK-NEXT: cvt.s16.s8 %rs2, %rs1;
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; CHECK-NEXT: shr.s16 %rs3, %rs1, 8;
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; CHECK-NEXT: add.s16 %rs4, %rs2, %rs3;
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; CHECK-NEXT: cvt.u32.u16 %r1, %rs4;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
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; CHECK-NEXT: ret;
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%v = bitcast i16 %a to <2 x i8>
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%r0 = extractelement <2 x i8> %v, i64 0
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%r1 = extractelement <2 x i8> %v, i64 1
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%r0i = sext i8 %r0 to i16
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%r1i = sext i8 %r1 to i16
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%r01 = add i16 %r0i, %r1i
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ret i16 %r01
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}
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define i1 @test_v2i8_load(ptr %a) {
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; CHECK-LABEL: test_v2i8_load(
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; CHECK: {
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; CHECK-NEXT: .reg .pred %p<2>;
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; CHECK-NEXT: .reg .b16 %rs<7>;
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; CHECK-NEXT: .reg .b32 %r<2>;
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b64 %rd1, [test_v2i8_load_param_0];
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; CHECK-NEXT: ld.v2.b8 {%rs1, %rs2}, [%rd1];
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; CHECK-NEXT: or.b16 %rs5, %rs1, %rs2;
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; CHECK-NEXT: and.b16 %rs6, %rs5, 255;
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; CHECK-NEXT: setp.eq.s16 %p1, %rs6, 0;
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; CHECK-NEXT: selp.b32 %r1, -1, 0, %p1;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
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; CHECK-NEXT: ret;
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%v = load <2 x i8>, ptr %a, align 4
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%r0 = extractelement <2 x i8> %v, i64 0
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%r1 = extractelement <2 x i8> %v, i64 1
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%icmp = icmp eq i8 %r0, 0
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%icmp3 = icmp eq i8 %r1, 0
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%select = select i1 %icmp, i1 %icmp3, i1 false
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ret i1 %select
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}
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define i16 @test_v4i8(i32 %a) {
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; CHECK-LABEL: test_v4i8(
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; CHECK: {
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; CHECK-NEXT: .reg .b16 %rs<8>;
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; CHECK-NEXT: .reg .b32 %r<7>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [test_v4i8_param_0];
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; CHECK-NEXT: bfe.s32 %r2, %r1, 0, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs1, %r2;
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; CHECK-NEXT: bfe.s32 %r3, %r1, 8, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs2, %r3;
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; CHECK-NEXT: bfe.s32 %r4, %r1, 16, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs3, %r4;
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; CHECK-NEXT: bfe.s32 %r5, %r1, 24, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs4, %r5;
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; CHECK-NEXT: add.s16 %rs5, %rs1, %rs2;
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; CHECK-NEXT: add.s16 %rs6, %rs3, %rs4;
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; CHECK-NEXT: add.s16 %rs7, %rs5, %rs6;
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; CHECK-NEXT: cvt.u32.u16 %r6, %rs7;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r6;
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; CHECK-NEXT: ret;
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%v = bitcast i32 %a to <4 x i8>
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%r0 = extractelement <4 x i8> %v, i64 0
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%r1 = extractelement <4 x i8> %v, i64 1
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%r2 = extractelement <4 x i8> %v, i64 2
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%r3 = extractelement <4 x i8> %v, i64 3
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%r0i = sext i8 %r0 to i16
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%r1i = sext i8 %r1 to i16
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%r2i = sext i8 %r2 to i16
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%r3i = sext i8 %r3 to i16
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%r01 = add i16 %r0i, %r1i
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%r23 = add i16 %r2i, %r3i
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%r = add i16 %r01, %r23
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ret i16 %r
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}
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define i32 @test_v4i8_s32(i32 %a) {
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; CHECK-LABEL: test_v4i8_s32(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<9>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [test_v4i8_s32_param_0];
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; CHECK-NEXT: bfe.s32 %r2, %r1, 0, 8;
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; CHECK-NEXT: bfe.s32 %r3, %r1, 8, 8;
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; CHECK-NEXT: bfe.s32 %r4, %r1, 16, 8;
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; CHECK-NEXT: bfe.s32 %r5, %r1, 24, 8;
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; CHECK-NEXT: add.s32 %r6, %r2, %r3;
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; CHECK-NEXT: add.s32 %r7, %r4, %r5;
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; CHECK-NEXT: add.s32 %r8, %r6, %r7;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r8;
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; CHECK-NEXT: ret;
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%v = bitcast i32 %a to <4 x i8>
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%r0 = extractelement <4 x i8> %v, i64 0
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%r1 = extractelement <4 x i8> %v, i64 1
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%r2 = extractelement <4 x i8> %v, i64 2
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%r3 = extractelement <4 x i8> %v, i64 3
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%r0i = sext i8 %r0 to i32
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%r1i = sext i8 %r1 to i32
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%r2i = sext i8 %r2 to i32
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%r3i = sext i8 %r3 to i32
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%r01 = add i32 %r0i, %r1i
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%r23 = add i32 %r2i, %r3i
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%r = add i32 %r01, %r23
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ret i32 %r
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}
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define i32 @test_v4i8_u32(i32 %a) {
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; CHECK-LABEL: test_v4i8_u32(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<9>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [test_v4i8_u32_param_0];
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; CHECK-NEXT: bfe.u32 %r2, %r1, 0, 8;
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; CHECK-NEXT: bfe.u32 %r3, %r1, 8, 8;
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; CHECK-NEXT: bfe.u32 %r4, %r1, 16, 8;
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; CHECK-NEXT: bfe.u32 %r5, %r1, 24, 8;
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; CHECK-NEXT: add.s32 %r6, %r2, %r3;
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; CHECK-NEXT: add.s32 %r7, %r4, %r5;
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; CHECK-NEXT: add.s32 %r8, %r6, %r7;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r8;
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; CHECK-NEXT: ret;
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%v = bitcast i32 %a to <4 x i8>
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%r0 = extractelement <4 x i8> %v, i64 0
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%r1 = extractelement <4 x i8> %v, i64 1
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%r2 = extractelement <4 x i8> %v, i64 2
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%r3 = extractelement <4 x i8> %v, i64 3
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%r0i = zext i8 %r0 to i32
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%r1i = zext i8 %r1 to i32
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%r2i = zext i8 %r2 to i32
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%r3i = zext i8 %r3 to i32
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%r01 = add i32 %r0i, %r1i
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%r23 = add i32 %r2i, %r3i
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%r = add i32 %r01, %r23
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ret i32 %r
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}
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define i16 @test_v8i8(i64 %a) {
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; CHECK-LABEL: test_v8i8(
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; CHECK: {
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; CHECK-NEXT: .reg .b16 %rs<16>;
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; CHECK-NEXT: .reg .b32 %r<12>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.v2.b32 {%r1, %r2}, [test_v8i8_param_0];
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; CHECK-NEXT: bfe.s32 %r3, %r1, 0, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs1, %r3;
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; CHECK-NEXT: bfe.s32 %r4, %r1, 8, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs2, %r4;
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; CHECK-NEXT: bfe.s32 %r5, %r1, 16, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs3, %r5;
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; CHECK-NEXT: bfe.s32 %r6, %r1, 24, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs4, %r6;
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; CHECK-NEXT: bfe.s32 %r7, %r2, 0, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs5, %r7;
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; CHECK-NEXT: bfe.s32 %r8, %r2, 8, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs6, %r8;
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; CHECK-NEXT: bfe.s32 %r9, %r2, 16, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs7, %r9;
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; CHECK-NEXT: bfe.s32 %r10, %r2, 24, 8;
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; CHECK-NEXT: cvt.s8.s32 %rs8, %r10;
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; CHECK-NEXT: add.s16 %rs9, %rs1, %rs2;
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; CHECK-NEXT: add.s16 %rs10, %rs3, %rs4;
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; CHECK-NEXT: add.s16 %rs11, %rs5, %rs6;
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; CHECK-NEXT: add.s16 %rs12, %rs7, %rs8;
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; CHECK-NEXT: add.s16 %rs13, %rs9, %rs10;
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; CHECK-NEXT: add.s16 %rs14, %rs11, %rs12;
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; CHECK-NEXT: add.s16 %rs15, %rs13, %rs14;
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; CHECK-NEXT: cvt.u32.u16 %r11, %rs15;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r11;
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; CHECK-NEXT: ret;
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%v = bitcast i64 %a to <8 x i8>
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%r0 = extractelement <8 x i8> %v, i64 0
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%r1 = extractelement <8 x i8> %v, i64 1
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%r2 = extractelement <8 x i8> %v, i64 2
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%r3 = extractelement <8 x i8> %v, i64 3
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%r4 = extractelement <8 x i8> %v, i64 4
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%r5 = extractelement <8 x i8> %v, i64 5
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%r6 = extractelement <8 x i8> %v, i64 6
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%r7 = extractelement <8 x i8> %v, i64 7
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%r0i = sext i8 %r0 to i16
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%r1i = sext i8 %r1 to i16
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%r2i = sext i8 %r2 to i16
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%r3i = sext i8 %r3 to i16
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%r4i = sext i8 %r4 to i16
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%r5i = sext i8 %r5 to i16
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%r6i = sext i8 %r6 to i16
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%r7i = sext i8 %r7 to i16
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%r01 = add i16 %r0i, %r1i
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%r23 = add i16 %r2i, %r3i
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%r45 = add i16 %r4i, %r5i
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%r67 = add i16 %r6i, %r7i
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%r0123 = add i16 %r01, %r23
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%r4567 = add i16 %r45, %r67
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%r = add i16 %r0123, %r4567
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ret i16 %r
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}
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