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clang-p2996/clang/test/OpenMP/teams_codegen.cpp
Joseph Huber 5300263c70 [OpenMP] Add loop tripcount argument to kernel launch and remove push function 
Previously we added the `push_target_tripcount` function to send the
loop tripcount to the device runtime so we knew how to configure the
teams / threads for execute the loop for a teams distribute construct.
This was implemented as a separate function mostly to avoid changing the
interface for backwards compatbility. Now that we've changed it anyway
and the new interface can take an arbitrary number of arguments via the
struct without changing the ABI, we can move this to the new interface.
This will simplify the runtime by removing unnecessary state between
calls.

Depends on D128550

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D128816
2022-07-08 14:44:16 -04:00

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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
// expected-no-diagnostics
#ifndef HEADER
#define HEADER
// Test host codegen.
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
#ifdef CK1
int Gbla;
long long Gblb;
int &Gblc = Gbla;
int teams_argument_global_local(int a){
int comp = 1;
int la = 23;
float lc = 25.0;
#pragma omp target
#pragma omp teams
{
++comp;
}
#pragma omp target
{{{
#pragma omp teams
{
++comp;
}
}}}
#pragma omp target
#pragma omp teams num_teams(la)
{
++comp;
}
#pragma omp target
#pragma omp teams thread_limit(la)
{
++comp;
}
#pragma omp target
#pragma omp teams num_teams(Gbla+a) thread_limit(Gblb+(long long)lc)
{
++comp;
}
#pragma omp target
#pragma omp teams num_teams(Gblc+1) thread_limit(Gblc+2)
{
comp += Gblc;
}
return comp;
}
#endif // CK1
// Test host codegen.
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
#ifdef CK2
template <typename T>
struct SS{
T a;
float b;
};
SS<int> Gbla;
SS<long long> Gblb;
int teams_template_arg(void) {
int comp = 1;
SS<int> la;
SS<long long> lb;
#pragma omp target
#pragma omp teams num_teams(Gbla.a) thread_limit((long long)la.b)
{
++comp;
}
#pragma omp target
#pragma omp teams num_teams((long long)lb.b) thread_limit(Gblb.a)
{
++comp;
}
return comp;
}
#endif // CK2
// Test host codegen.
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK3 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
#ifdef CK3
template <typename T, int X, long long Y>
struct SS{
T a;
float b;
int foo(void) {
int comp = 1;
#pragma omp target
#pragma omp teams num_teams(a) thread_limit(X)
{
++comp;
}
#pragma omp target
#pragma omp teams num_teams(Y) thread_limit((int)b+X)
{
++comp;
}
return comp;
}
};
int teams_template_struct(void) {
SS<int, 123, 456> V;
return V.foo();
}
#endif // CK3
// Test target codegen - host bc file has to be created first.
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK25
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK25
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK27
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK27
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK4 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
#ifdef CK4
template <typename T>
int tmain(T argc) {
#pragma omp target
#pragma omp teams
argc = 0;
return 0;
}
int main (int argc, char **argv) {
#pragma omp target
#pragma omp teams
argc = 0;
return tmain(argv);
}
#endif // CK4
// Test target codegen - host bc file has to be created first.
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK33
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK33
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK35
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK35
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK5 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// expected-no-diagnostics
#ifdef CK5
template <typename T>
int tmain(T argc) {
int a = 10;
int b = 5;
#pragma omp target
#pragma omp teams num_teams(a) thread_limit(b)
{
argc = 0;
}
return 0;
}
int main (int argc, char **argv) {
int a = 20;
int b = 5;
#pragma omp target
#pragma omp teams num_teams(a) thread_limit(b)
{
argc = 0;
}
return tmain(argv);
}
#endif // CK5
// Test host codegen.
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -verify -fopenmp -fopenmp-version=50 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK41
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -fopenmp-version=50 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK41
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -verify -fopenmp -fopenmp-version=50 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK43
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -fopenmp -fopenmp-version=50 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK43
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -verify -fopenmp-version=50 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -fopenmp-simd -fopenmp-version=50 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -fopenmp-simd -fopenmp-version=50 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -verify -fopenmp-simd -fopenmp-version=50 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -fopenmp-simd -fopenmp-version=50 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
// RUN: %clang_cc1 -no-opaque-pointers -DCK6 -fopenmp-simd -fopenmp-version=50 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
#ifdef CK6
void foo() {
#pragma omp teams
;
}
#endif // CK6
#endif
// CHECK1-LABEL: define {{[^@]+}}@_Z27teams_argument_global_locali
// CHECK1-SAME: (i32 noundef signext [[A:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[COMP:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[LA:%.*]] = alloca i32, align 4
// CHECK1-NEXT: [[LC:%.*]] = alloca float, align 4
// CHECK1-NEXT: [[COMP_CASTED:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
// CHECK1-NEXT: [[COMP_CASTED1:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
// CHECK1-NEXT: [[LA_CASTED:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[COMP_CASTED10:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS12:%.*]] = alloca [2 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_PTRS13:%.*]] = alloca [2 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS14:%.*]] = alloca [2 x i8*], align 8
// CHECK1-NEXT: [[LA_CASTED18:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[COMP_CASTED20:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [2 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [2 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [2 x i8*], align 8
// CHECK1-NEXT: [[GBLA_CASTED:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[GBLB_CASTED:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[LC_CASTED:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[COMP_CASTED31:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS33:%.*]] = alloca [5 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_PTRS34:%.*]] = alloca [5 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS35:%.*]] = alloca [5 x i8*], align 8
// CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[GBLC_CASTED:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[COMP_CASTED42:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS44:%.*]] = alloca [2 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_PTRS45:%.*]] = alloca [2 x i8*], align 8
// CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS46:%.*]] = alloca [2 x i8*], align 8
// CHECK1-NEXT: [[_TMP47:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[_TMP49:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
// CHECK1-NEXT: store i32 1, i32* [[COMP]], align 4
// CHECK1-NEXT: store i32 23, i32* [[LA]], align 4
// CHECK1-NEXT: store float 2.500000e+01, float* [[LC]], align 4
// CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[COMP_CASTED]] to i32*
// CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
// CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[COMP_CASTED]], align 8
// CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
// CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
// CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
// CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8
// CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
// CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
// CHECK1-NEXT: store i32 1, i32* [[TMP9]], align 4
// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
// CHECK1-NEXT: store i32 1, i32* [[TMP10]], align 4
// CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
// CHECK1-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 8
// CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
// CHECK1-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 8
// CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
// CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 8
// CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
// CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 8
// CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
// CHECK1-NEXT: store i8** null, i8*** [[TMP15]], align 8
// CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
// CHECK1-NEXT: store i8** null, i8*** [[TMP16]], align 8
// CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
// CHECK1-NEXT: store i64 0, i64* [[TMP17]], align 8
// CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l31.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
// CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
// CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK1: omp_offload.failed:
// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l31(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK1: omp_offload.cont:
// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[COMP_CASTED1]] to i32*
// CHECK1-NEXT: store i32 [[TMP20]], i32* [[CONV2]], align 4
// CHECK1-NEXT: [[TMP21:%.*]] = load i64, i64* [[COMP_CASTED1]], align 8
// CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
// CHECK1-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
// CHECK1-NEXT: store i64 [[TMP21]], i64* [[TMP23]], align 8
// CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
// CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
// CHECK1-NEXT: store i64 [[TMP21]], i64* [[TMP25]], align 8
// CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
// CHECK1-NEXT: store i8* null, i8** [[TMP26]], align 8
// CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
// CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
// CHECK1-NEXT: [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 0
// CHECK1-NEXT: store i32 1, i32* [[TMP29]], align 4
// CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 1
// CHECK1-NEXT: store i32 1, i32* [[TMP30]], align 4
// CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 2
// CHECK1-NEXT: store i8** [[TMP27]], i8*** [[TMP31]], align 8
// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 3
// CHECK1-NEXT: store i8** [[TMP28]], i8*** [[TMP32]], align 8
// CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 4
// CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP33]], align 8
// CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 5
// CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP34]], align 8
// CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 6
// CHECK1-NEXT: store i8** null, i8*** [[TMP35]], align 8
// CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 7
// CHECK1-NEXT: store i8** null, i8*** [[TMP36]], align 8
// CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]], i32 0, i32 8
// CHECK1-NEXT: store i64 0, i64* [[TMP37]], align 8
// CHECK1-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l37.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS6]])
// CHECK1-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
// CHECK1-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
// CHECK1: omp_offload.failed7:
// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l37(i64 [[TMP21]]) #[[ATTR2]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]]
// CHECK1: omp_offload.cont8:
// CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[LA]], align 4
// CHECK1-NEXT: [[CONV9:%.*]] = bitcast i64* [[LA_CASTED]] to i32*
// CHECK1-NEXT: store i32 [[TMP40]], i32* [[CONV9]], align 4
// CHECK1-NEXT: [[TMP41:%.*]] = load i64, i64* [[LA_CASTED]], align 8
// CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK1-NEXT: [[CONV11:%.*]] = bitcast i64* [[COMP_CASTED10]] to i32*
// CHECK1-NEXT: store i32 [[TMP42]], i32* [[CONV11]], align 4
// CHECK1-NEXT: [[TMP43:%.*]] = load i64, i64* [[COMP_CASTED10]], align 8
// CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
// CHECK1-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
// CHECK1-NEXT: store i64 [[TMP41]], i64* [[TMP45]], align 8
// CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
// CHECK1-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i64*
// CHECK1-NEXT: store i64 [[TMP41]], i64* [[TMP47]], align 8
// CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 0
// CHECK1-NEXT: store i8* null, i8** [[TMP48]], align 8
// CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 1
// CHECK1-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i64*
// CHECK1-NEXT: store i64 [[TMP43]], i64* [[TMP50]], align 8
// CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 1
// CHECK1-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i64*
// CHECK1-NEXT: store i64 [[TMP43]], i64* [[TMP52]], align 8
// CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS14]], i64 0, i64 1
// CHECK1-NEXT: store i8* null, i8** [[TMP53]], align 8
// CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS12]], i32 0, i32 0
// CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS13]], i32 0, i32 0
// CHECK1-NEXT: [[TMP56:%.*]] = load i32, i32* [[LA]], align 4
// CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
// CHECK1-NEXT: store i32 1, i32* [[TMP57]], align 4
// CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
// CHECK1-NEXT: store i32 2, i32* [[TMP58]], align 4
// CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
// CHECK1-NEXT: store i8** [[TMP54]], i8*** [[TMP59]], align 8
// CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
// CHECK1-NEXT: store i8** [[TMP55]], i8*** [[TMP60]], align 8
// CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
// CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP61]], align 8
// CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
// CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP62]], align 8
// CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
// CHECK1-NEXT: store i8** null, i8*** [[TMP63]], align 8
// CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
// CHECK1-NEXT: store i8** null, i8*** [[TMP64]], align 8
// CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
// CHECK1-NEXT: store i64 0, i64* [[TMP65]], align 8
// CHECK1-NEXT: [[TMP66:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 [[TMP56]], i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l46.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
// CHECK1-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0
// CHECK1-NEXT: br i1 [[TMP67]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
// CHECK1: omp_offload.failed16:
// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l46(i64 [[TMP41]], i64 [[TMP43]]) #[[ATTR2]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]]
// CHECK1: omp_offload.cont17:
// CHECK1-NEXT: [[TMP68:%.*]] = load i32, i32* [[LA]], align 4
// CHECK1-NEXT: [[CONV19:%.*]] = bitcast i64* [[LA_CASTED18]] to i32*
// CHECK1-NEXT: store i32 [[TMP68]], i32* [[CONV19]], align 4
// CHECK1-NEXT: [[TMP69:%.*]] = load i64, i64* [[LA_CASTED18]], align 8
// CHECK1-NEXT: [[TMP70:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK1-NEXT: [[CONV21:%.*]] = bitcast i64* [[COMP_CASTED20]] to i32*
// CHECK1-NEXT: store i32 [[TMP70]], i32* [[CONV21]], align 4
// CHECK1-NEXT: [[TMP71:%.*]] = load i64, i64* [[COMP_CASTED20]], align 8
// CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
// CHECK1-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64*
// CHECK1-NEXT: store i64 [[TMP69]], i64* [[TMP73]], align 8
// CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
// CHECK1-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
// CHECK1-NEXT: store i64 [[TMP69]], i64* [[TMP75]], align 8
// CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
// CHECK1-NEXT: store i8* null, i8** [[TMP76]], align 8
// CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
// CHECK1-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64*
// CHECK1-NEXT: store i64 [[TMP71]], i64* [[TMP78]], align 8
// CHECK1-NEXT: [[TMP79:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
// CHECK1-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i64*
// CHECK1-NEXT: store i64 [[TMP71]], i64* [[TMP80]], align 8
// CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
// CHECK1-NEXT: store i8* null, i8** [[TMP81]], align 8
// CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
// CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
// CHECK1-NEXT: [[TMP84:%.*]] = load i32, i32* [[LA]], align 4
// CHECK1-NEXT: [[KERNEL_ARGS25:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS25]], i32 0, i32 0
// CHECK1-NEXT: store i32 1, i32* [[TMP85]], align 4
// CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS25]], i32 0, i32 1
// CHECK1-NEXT: store i32 2, i32* [[TMP86]], align 4
// CHECK1-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS25]], i32 0, i32 2
// CHECK1-NEXT: store i8** [[TMP82]], i8*** [[TMP87]], align 8
// CHECK1-NEXT: [[TMP88:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS25]], i32 0, i32 3
// CHECK1-NEXT: store i8** [[TMP83]], i8*** [[TMP88]], align 8
// CHECK1-NEXT: [[TMP89:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS25]], i32 0, i32 4
// CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP89]], align 8
// CHECK1-NEXT: [[TMP90:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS25]], i32 0, i32 5
// CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP90]], align 8
// CHECK1-NEXT: [[TMP91:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS25]], i32 0, i32 6
// CHECK1-NEXT: store i8** null, i8*** [[TMP91]], align 8
// CHECK1-NEXT: [[TMP92:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS25]], i32 0, i32 7
// CHECK1-NEXT: store i8** null, i8*** [[TMP92]], align 8
// CHECK1-NEXT: [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS25]], i32 0, i32 8
// CHECK1-NEXT: store i64 0, i64* [[TMP93]], align 8
// CHECK1-NEXT: [[TMP94:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 [[TMP84]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l53.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS25]])
// CHECK1-NEXT: [[TMP95:%.*]] = icmp ne i32 [[TMP94]], 0
// CHECK1-NEXT: br i1 [[TMP95]], label [[OMP_OFFLOAD_FAILED26:%.*]], label [[OMP_OFFLOAD_CONT27:%.*]]
// CHECK1: omp_offload.failed26:
// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l53(i64 [[TMP69]], i64 [[TMP71]]) #[[ATTR2]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT27]]
// CHECK1: omp_offload.cont27:
// CHECK1-NEXT: [[TMP96:%.*]] = load i32, i32* @Gbla, align 4
// CHECK1-NEXT: [[CONV28:%.*]] = bitcast i64* [[GBLA_CASTED]] to i32*
// CHECK1-NEXT: store i32 [[TMP96]], i32* [[CONV28]], align 4
// CHECK1-NEXT: [[TMP97:%.*]] = load i64, i64* [[GBLA_CASTED]], align 8
// CHECK1-NEXT: [[TMP98:%.*]] = load i32, i32* [[A_ADDR]], align 4
// CHECK1-NEXT: [[CONV29:%.*]] = bitcast i64* [[A_CASTED]] to i32*
// CHECK1-NEXT: store i32 [[TMP98]], i32* [[CONV29]], align 4
// CHECK1-NEXT: [[TMP99:%.*]] = load i64, i64* [[A_CASTED]], align 8
// CHECK1-NEXT: [[TMP100:%.*]] = load i64, i64* @Gblb, align 8
// CHECK1-NEXT: store i64 [[TMP100]], i64* [[GBLB_CASTED]], align 8
// CHECK1-NEXT: [[TMP101:%.*]] = load i64, i64* [[GBLB_CASTED]], align 8
// CHECK1-NEXT: [[TMP102:%.*]] = load float, float* [[LC]], align 4
// CHECK1-NEXT: [[CONV30:%.*]] = bitcast i64* [[LC_CASTED]] to float*
// CHECK1-NEXT: store float [[TMP102]], float* [[CONV30]], align 4
// CHECK1-NEXT: [[TMP103:%.*]] = load i64, i64* [[LC_CASTED]], align 8
// CHECK1-NEXT: [[TMP104:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK1-NEXT: [[CONV32:%.*]] = bitcast i64* [[COMP_CASTED31]] to i32*
// CHECK1-NEXT: store i32 [[TMP104]], i32* [[CONV32]], align 4
// CHECK1-NEXT: [[TMP105:%.*]] = load i64, i64* [[COMP_CASTED31]], align 8
// CHECK1-NEXT: [[TMP106:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
// CHECK1-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
// CHECK1-NEXT: store i64 [[TMP97]], i64* [[TMP107]], align 8
// CHECK1-NEXT: [[TMP108:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
// CHECK1-NEXT: [[TMP109:%.*]] = bitcast i8** [[TMP108]] to i64*
// CHECK1-NEXT: store i64 [[TMP97]], i64* [[TMP109]], align 8
// CHECK1-NEXT: [[TMP110:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i64 0, i64 0
// CHECK1-NEXT: store i8* null, i8** [[TMP110]], align 8
// CHECK1-NEXT: [[TMP111:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 1
// CHECK1-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i64*
// CHECK1-NEXT: store i64 [[TMP99]], i64* [[TMP112]], align 8
// CHECK1-NEXT: [[TMP113:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 1
// CHECK1-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i64*
// CHECK1-NEXT: store i64 [[TMP99]], i64* [[TMP114]], align 8
// CHECK1-NEXT: [[TMP115:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i64 0, i64 1
// CHECK1-NEXT: store i8* null, i8** [[TMP115]], align 8
// CHECK1-NEXT: [[TMP116:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 2
// CHECK1-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i64*
// CHECK1-NEXT: store i64 [[TMP101]], i64* [[TMP117]], align 8
// CHECK1-NEXT: [[TMP118:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 2
// CHECK1-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i64*
// CHECK1-NEXT: store i64 [[TMP101]], i64* [[TMP119]], align 8
// CHECK1-NEXT: [[TMP120:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i64 0, i64 2
// CHECK1-NEXT: store i8* null, i8** [[TMP120]], align 8
// CHECK1-NEXT: [[TMP121:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 3
// CHECK1-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i64*
// CHECK1-NEXT: store i64 [[TMP103]], i64* [[TMP122]], align 8
// CHECK1-NEXT: [[TMP123:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 3
// CHECK1-NEXT: [[TMP124:%.*]] = bitcast i8** [[TMP123]] to i64*
// CHECK1-NEXT: store i64 [[TMP103]], i64* [[TMP124]], align 8
// CHECK1-NEXT: [[TMP125:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i64 0, i64 3
// CHECK1-NEXT: store i8* null, i8** [[TMP125]], align 8
// CHECK1-NEXT: [[TMP126:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 4
// CHECK1-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to i64*
// CHECK1-NEXT: store i64 [[TMP105]], i64* [[TMP127]], align 8
// CHECK1-NEXT: [[TMP128:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 4
// CHECK1-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i64*
// CHECK1-NEXT: store i64 [[TMP105]], i64* [[TMP129]], align 8
// CHECK1-NEXT: [[TMP130:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i64 0, i64 4
// CHECK1-NEXT: store i8* null, i8** [[TMP130]], align 8
// CHECK1-NEXT: [[TMP131:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
// CHECK1-NEXT: [[TMP132:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
// CHECK1-NEXT: [[TMP133:%.*]] = load i32, i32* @Gbla, align 4
// CHECK1-NEXT: [[TMP134:%.*]] = load i32, i32* [[A_ADDR]], align 4
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP133]], [[TMP134]]
// CHECK1-NEXT: [[TMP135:%.*]] = load i64, i64* @Gblb, align 8
// CHECK1-NEXT: [[TMP136:%.*]] = load float, float* [[LC]], align 4
// CHECK1-NEXT: [[CONV36:%.*]] = fptosi float [[TMP136]] to i64
// CHECK1-NEXT: [[ADD37:%.*]] = add nsw i64 [[TMP135]], [[CONV36]]
// CHECK1-NEXT: [[TMP137:%.*]] = trunc i64 [[ADD37]] to i32
// CHECK1-NEXT: [[KERNEL_ARGS38:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK1-NEXT: [[TMP138:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS38]], i32 0, i32 0
// CHECK1-NEXT: store i32 1, i32* [[TMP138]], align 4
// CHECK1-NEXT: [[TMP139:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS38]], i32 0, i32 1
// CHECK1-NEXT: store i32 5, i32* [[TMP139]], align 4
// CHECK1-NEXT: [[TMP140:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS38]], i32 0, i32 2
// CHECK1-NEXT: store i8** [[TMP131]], i8*** [[TMP140]], align 8
// CHECK1-NEXT: [[TMP141:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS38]], i32 0, i32 3
// CHECK1-NEXT: store i8** [[TMP132]], i8*** [[TMP141]], align 8
// CHECK1-NEXT: [[TMP142:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS38]], i32 0, i32 4
// CHECK1-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.11, i32 0, i32 0), i64** [[TMP142]], align 8
// CHECK1-NEXT: [[TMP143:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS38]], i32 0, i32 5
// CHECK1-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.12, i32 0, i32 0), i64** [[TMP143]], align 8
// CHECK1-NEXT: [[TMP144:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS38]], i32 0, i32 6
// CHECK1-NEXT: store i8** null, i8*** [[TMP144]], align 8
// CHECK1-NEXT: [[TMP145:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS38]], i32 0, i32 7
// CHECK1-NEXT: store i8** null, i8*** [[TMP145]], align 8
// CHECK1-NEXT: [[TMP146:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS38]], i32 0, i32 8
// CHECK1-NEXT: store i64 0, i64* [[TMP146]], align 8
// CHECK1-NEXT: [[TMP147:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 [[ADD]], i32 [[TMP137]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l62.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS38]])
// CHECK1-NEXT: [[TMP148:%.*]] = icmp ne i32 [[TMP147]], 0
// CHECK1-NEXT: br i1 [[TMP148]], label [[OMP_OFFLOAD_FAILED39:%.*]], label [[OMP_OFFLOAD_CONT40:%.*]]
// CHECK1: omp_offload.failed39:
// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l62(i64 [[TMP97]], i64 [[TMP99]], i64 [[TMP101]], i64 [[TMP103]], i64 [[TMP105]]) #[[ATTR2]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT40]]
// CHECK1: omp_offload.cont40:
// CHECK1-NEXT: [[TMP149:%.*]] = load i32*, i32** @Gblc, align 8
// CHECK1-NEXT: store i32* [[TMP149]], i32** [[TMP]], align 8
// CHECK1-NEXT: [[TMP150:%.*]] = load i32, i32* @Gbla, align 4
// CHECK1-NEXT: [[CONV41:%.*]] = bitcast i64* [[GBLC_CASTED]] to i32*
// CHECK1-NEXT: store i32 [[TMP150]], i32* [[CONV41]], align 4
// CHECK1-NEXT: [[TMP151:%.*]] = load i64, i64* [[GBLC_CASTED]], align 8
// CHECK1-NEXT: [[TMP152:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK1-NEXT: [[CONV43:%.*]] = bitcast i64* [[COMP_CASTED42]] to i32*
// CHECK1-NEXT: store i32 [[TMP152]], i32* [[CONV43]], align 4
// CHECK1-NEXT: [[TMP153:%.*]] = load i64, i64* [[COMP_CASTED42]], align 8
// CHECK1-NEXT: [[TMP154:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0
// CHECK1-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i64*
// CHECK1-NEXT: store i64 [[TMP151]], i64* [[TMP155]], align 8
// CHECK1-NEXT: [[TMP156:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0
// CHECK1-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i64*
// CHECK1-NEXT: store i64 [[TMP151]], i64* [[TMP157]], align 8
// CHECK1-NEXT: [[TMP158:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i64 0, i64 0
// CHECK1-NEXT: store i8* null, i8** [[TMP158]], align 8
// CHECK1-NEXT: [[TMP159:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 1
// CHECK1-NEXT: [[TMP160:%.*]] = bitcast i8** [[TMP159]] to i64*
// CHECK1-NEXT: store i64 [[TMP153]], i64* [[TMP160]], align 8
// CHECK1-NEXT: [[TMP161:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 1
// CHECK1-NEXT: [[TMP162:%.*]] = bitcast i8** [[TMP161]] to i64*
// CHECK1-NEXT: store i64 [[TMP153]], i64* [[TMP162]], align 8
// CHECK1-NEXT: [[TMP163:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS46]], i64 0, i64 1
// CHECK1-NEXT: store i8* null, i8** [[TMP163]], align 8
// CHECK1-NEXT: [[TMP164:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS44]], i32 0, i32 0
// CHECK1-NEXT: [[TMP165:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS45]], i32 0, i32 0
// CHECK1-NEXT: [[TMP166:%.*]] = load i32*, i32** @Gblc, align 8
// CHECK1-NEXT: store i32* [[TMP166]], i32** [[_TMP47]], align 8
// CHECK1-NEXT: [[TMP167:%.*]] = load i32, i32* @Gbla, align 4
// CHECK1-NEXT: [[ADD48:%.*]] = add nsw i32 [[TMP167]], 1
// CHECK1-NEXT: [[TMP168:%.*]] = load i32*, i32** @Gblc, align 8
// CHECK1-NEXT: store i32* [[TMP168]], i32** [[_TMP49]], align 8
// CHECK1-NEXT: [[TMP169:%.*]] = load i32, i32* @Gbla, align 4
// CHECK1-NEXT: [[ADD50:%.*]] = add nsw i32 [[TMP169]], 2
// CHECK1-NEXT: [[KERNEL_ARGS51:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK1-NEXT: [[TMP170:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS51]], i32 0, i32 0
// CHECK1-NEXT: store i32 1, i32* [[TMP170]], align 4
// CHECK1-NEXT: [[TMP171:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS51]], i32 0, i32 1
// CHECK1-NEXT: store i32 2, i32* [[TMP171]], align 4
// CHECK1-NEXT: [[TMP172:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS51]], i32 0, i32 2
// CHECK1-NEXT: store i8** [[TMP164]], i8*** [[TMP172]], align 8
// CHECK1-NEXT: [[TMP173:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS51]], i32 0, i32 3
// CHECK1-NEXT: store i8** [[TMP165]], i8*** [[TMP173]], align 8
// CHECK1-NEXT: [[TMP174:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS51]], i32 0, i32 4
// CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.14, i32 0, i32 0), i64** [[TMP174]], align 8
// CHECK1-NEXT: [[TMP175:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS51]], i32 0, i32 5
// CHECK1-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.15, i32 0, i32 0), i64** [[TMP175]], align 8
// CHECK1-NEXT: [[TMP176:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS51]], i32 0, i32 6
// CHECK1-NEXT: store i8** null, i8*** [[TMP176]], align 8
// CHECK1-NEXT: [[TMP177:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS51]], i32 0, i32 7
// CHECK1-NEXT: store i8** null, i8*** [[TMP177]], align 8
// CHECK1-NEXT: [[TMP178:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS51]], i32 0, i32 8
// CHECK1-NEXT: store i64 0, i64* [[TMP178]], align 8
// CHECK1-NEXT: [[TMP179:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 [[ADD48]], i32 [[ADD50]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l71.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS51]])
// CHECK1-NEXT: [[TMP180:%.*]] = icmp ne i32 [[TMP179]], 0
// CHECK1-NEXT: br i1 [[TMP180]], label [[OMP_OFFLOAD_FAILED52:%.*]], label [[OMP_OFFLOAD_CONT53:%.*]]
// CHECK1: omp_offload.failed52:
// CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l71(i64 [[TMP151]], i64 [[TMP153]]) #[[ATTR2]]
// CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT53]]
// CHECK1: omp_offload.cont53:
// CHECK1-NEXT: [[TMP181:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK1-NEXT: ret i32 [[TMP181]]
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l31
// CHECK1-SAME: (i64 noundef [[COMP:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: store i64 [[COMP]], i64* [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[COMP_ADDR]] to i32*
// CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK1-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l37
// CHECK1-SAME: (i64 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: store i64 [[COMP]], i64* [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[COMP_ADDR]] to i32*
// CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]])
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
// CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK1-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l46
// CHECK1-SAME: (i64 noundef [[LA:%.*]], i64 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[LA_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK1-NEXT: store i64 [[LA]], i64* [[LA_ADDR]], align 8
// CHECK1-NEXT: store i64 [[COMP]], i64* [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[LA_ADDR]] to i32*
// CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[COMP_ADDR]] to i32*
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
// CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[CONV1]])
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
// CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK1-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l53
// CHECK1-SAME: (i64 noundef [[LA:%.*]], i64 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[LA_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK1-NEXT: store i64 [[LA]], i64* [[LA_ADDR]], align 8
// CHECK1-NEXT: store i64 [[COMP]], i64* [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[LA_ADDR]] to i32*
// CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[COMP_ADDR]] to i32*
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 0, i32 [[TMP1]])
// CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32* [[CONV1]])
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
// CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK1-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l62
// CHECK1-SAME: (i64 noundef [[GBLA:%.*]], i64 noundef [[A:%.*]], i64 noundef [[GBLB:%.*]], i64 noundef [[LC:%.*]], i64 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[GBLA_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[GBLB_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[LC_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK1-NEXT: store i64 [[GBLA]], i64* [[GBLA_ADDR]], align 8
// CHECK1-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
// CHECK1-NEXT: store i64 [[GBLB]], i64* [[GBLB_ADDR]], align 8
// CHECK1-NEXT: store i64 [[LC]], i64* [[LC_ADDR]], align 8
// CHECK1-NEXT: store i64 [[COMP]], i64* [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[GBLA_ADDR]] to i32*
// CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_ADDR]] to i32*
// CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[LC_ADDR]] to float*
// CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[COMP_ADDR]] to i32*
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
// CHECK1-NEXT: [[TMP3:%.*]] = load i64, i64* [[GBLB_ADDR]], align 8
// CHECK1-NEXT: [[TMP4:%.*]] = load float, float* [[CONV2]], align 4
// CHECK1-NEXT: [[CONV4:%.*]] = fptosi float [[TMP4]] to i64
// CHECK1-NEXT: [[ADD5:%.*]] = add nsw i64 [[TMP3]], [[CONV4]]
// CHECK1-NEXT: [[TMP5:%.*]] = trunc i64 [[ADD5]] to i32
// CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[ADD]], i32 [[TMP5]])
// CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV3]])
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
// CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK1-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l71
// CHECK1-SAME: (i64 noundef [[GBLC:%.*]], i64 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[GBLC_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i64, align 8
// CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK1-NEXT: store i64 [[GBLC]], i64* [[GBLC_ADDR]], align 8
// CHECK1-NEXT: store i64 [[COMP]], i64* [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[GBLC_ADDR]] to i32*
// CHECK1-NEXT: [[CONV1:%.*]] = bitcast i64* [[COMP_ADDR]] to i32*
// CHECK1-NEXT: store i32* [[CONV]], i32** [[TMP]], align 8
// CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* @Gbla, align 4
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* @Gbla, align 4
// CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP2]], 2
// CHECK1-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[ADD]], i32 [[ADD2]])
// CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8
// CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i32* [[CONV1]], i32* [[TMP3]])
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13
// CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[GBLC:%.*]]) #[[ATTR1]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[GBLC_ADDR:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8
// CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK1-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: store i32* [[GBLC]], i32** [[GBLC_ADDR]], align 8
// CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 8
// CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[GBLC_ADDR]], align 8
// CHECK1-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 8
// CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* @Gbla, align 4
// CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[TMP2]]
// CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP0]], align 4
// CHECK1-NEXT: ret void
//
//
// CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
// CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
// CHECK1-NEXT: entry:
// CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
// CHECK1-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@_Z27teams_argument_global_locali
// CHECK3-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[COMP:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[LA:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[LC:%.*]] = alloca float, align 4
// CHECK3-NEXT: [[COMP_CASTED:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
// CHECK3-NEXT: [[COMP_CASTED1:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS2:%.*]] = alloca [1 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_PTRS3:%.*]] = alloca [1 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS4:%.*]] = alloca [1 x i8*], align 4
// CHECK3-NEXT: [[LA_CASTED:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[COMP_CASTED8:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS9:%.*]] = alloca [2 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_PTRS10:%.*]] = alloca [2 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS11:%.*]] = alloca [2 x i8*], align 4
// CHECK3-NEXT: [[LA_CASTED15:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[COMP_CASTED16:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [2 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [2 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [2 x i8*], align 4
// CHECK3-NEXT: [[GBLA_CASTED:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[LC_CASTED:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[COMP_CASTED23:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [5 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [5 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [5 x i8*], align 4
// CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[GBLC_CASTED:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[COMP_CASTED32:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS33:%.*]] = alloca [2 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_PTRS34:%.*]] = alloca [2 x i8*], align 4
// CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS35:%.*]] = alloca [2 x i8*], align 4
// CHECK3-NEXT: [[_TMP36:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[_TMP38:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
// CHECK3-NEXT: store i32 1, i32* [[COMP]], align 4
// CHECK3-NEXT: store i32 23, i32* [[LA]], align 4
// CHECK3-NEXT: store float 2.500000e+01, float* [[LC]], align 4
// CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK3-NEXT: store i32 [[TMP0]], i32* [[COMP_CASTED]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[COMP_CASTED]], align 4
// CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
// CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4
// CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
// CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
// CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
// CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4
// CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
// CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
// CHECK3-NEXT: store i32 1, i32* [[TMP9]], align 4
// CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
// CHECK3-NEXT: store i32 1, i32* [[TMP10]], align 4
// CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
// CHECK3-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 4
// CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
// CHECK3-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 4
// CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
// CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 4
// CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
// CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 4
// CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
// CHECK3-NEXT: store i8** null, i8*** [[TMP15]], align 4
// CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
// CHECK3-NEXT: store i8** null, i8*** [[TMP16]], align 4
// CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
// CHECK3-NEXT: store i64 0, i64* [[TMP17]], align 8
// CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l31.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
// CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
// CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK3: omp_offload.failed:
// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l31(i32 [[TMP1]]) #[[ATTR2:[0-9]+]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK3: omp_offload.cont:
// CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK3-NEXT: store i32 [[TMP20]], i32* [[COMP_CASTED1]], align 4
// CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[COMP_CASTED1]], align 4
// CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
// CHECK3-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
// CHECK3-NEXT: store i32 [[TMP21]], i32* [[TMP23]], align 4
// CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
// CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
// CHECK3-NEXT: store i32 [[TMP21]], i32* [[TMP25]], align 4
// CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 0
// CHECK3-NEXT: store i8* null, i8** [[TMP26]], align 4
// CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
// CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
// CHECK3-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
// CHECK3-NEXT: store i32 1, i32* [[TMP29]], align 4
// CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
// CHECK3-NEXT: store i32 1, i32* [[TMP30]], align 4
// CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
// CHECK3-NEXT: store i8** [[TMP27]], i8*** [[TMP31]], align 4
// CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
// CHECK3-NEXT: store i8** [[TMP28]], i8*** [[TMP32]], align 4
// CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
// CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP33]], align 4
// CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
// CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP34]], align 4
// CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
// CHECK3-NEXT: store i8** null, i8*** [[TMP35]], align 4
// CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
// CHECK3-NEXT: store i8** null, i8*** [[TMP36]], align 4
// CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
// CHECK3-NEXT: store i64 0, i64* [[TMP37]], align 8
// CHECK3-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l37.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
// CHECK3-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
// CHECK3-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
// CHECK3: omp_offload.failed6:
// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l37(i32 [[TMP21]]) #[[ATTR2]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT7]]
// CHECK3: omp_offload.cont7:
// CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[LA]], align 4
// CHECK3-NEXT: store i32 [[TMP40]], i32* [[LA_CASTED]], align 4
// CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[LA_CASTED]], align 4
// CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK3-NEXT: store i32 [[TMP42]], i32* [[COMP_CASTED8]], align 4
// CHECK3-NEXT: [[TMP43:%.*]] = load i32, i32* [[COMP_CASTED8]], align 4
// CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
// CHECK3-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32*
// CHECK3-NEXT: store i32 [[TMP41]], i32* [[TMP45]], align 4
// CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
// CHECK3-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
// CHECK3-NEXT: store i32 [[TMP41]], i32* [[TMP47]], align 4
// CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i32 0, i32 0
// CHECK3-NEXT: store i8* null, i8** [[TMP48]], align 4
// CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 1
// CHECK3-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32*
// CHECK3-NEXT: store i32 [[TMP43]], i32* [[TMP50]], align 4
// CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 1
// CHECK3-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32*
// CHECK3-NEXT: store i32 [[TMP43]], i32* [[TMP52]], align 4
// CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS11]], i32 0, i32 1
// CHECK3-NEXT: store i8* null, i8** [[TMP53]], align 4
// CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS9]], i32 0, i32 0
// CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS10]], i32 0, i32 0
// CHECK3-NEXT: [[TMP56:%.*]] = load i32, i32* [[LA]], align 4
// CHECK3-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
// CHECK3-NEXT: store i32 1, i32* [[TMP57]], align 4
// CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
// CHECK3-NEXT: store i32 2, i32* [[TMP58]], align 4
// CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
// CHECK3-NEXT: store i8** [[TMP54]], i8*** [[TMP59]], align 4
// CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
// CHECK3-NEXT: store i8** [[TMP55]], i8*** [[TMP60]], align 4
// CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
// CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.5, i32 0, i32 0), i64** [[TMP61]], align 4
// CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
// CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.6, i32 0, i32 0), i64** [[TMP62]], align 4
// CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
// CHECK3-NEXT: store i8** null, i8*** [[TMP63]], align 4
// CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
// CHECK3-NEXT: store i8** null, i8*** [[TMP64]], align 4
// CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
// CHECK3-NEXT: store i64 0, i64* [[TMP65]], align 8
// CHECK3-NEXT: [[TMP66:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 [[TMP56]], i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l46.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
// CHECK3-NEXT: [[TMP67:%.*]] = icmp ne i32 [[TMP66]], 0
// CHECK3-NEXT: br i1 [[TMP67]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
// CHECK3: omp_offload.failed13:
// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l46(i32 [[TMP41]], i32 [[TMP43]]) #[[ATTR2]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT14]]
// CHECK3: omp_offload.cont14:
// CHECK3-NEXT: [[TMP68:%.*]] = load i32, i32* [[LA]], align 4
// CHECK3-NEXT: store i32 [[TMP68]], i32* [[LA_CASTED15]], align 4
// CHECK3-NEXT: [[TMP69:%.*]] = load i32, i32* [[LA_CASTED15]], align 4
// CHECK3-NEXT: [[TMP70:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK3-NEXT: store i32 [[TMP70]], i32* [[COMP_CASTED16]], align 4
// CHECK3-NEXT: [[TMP71:%.*]] = load i32, i32* [[COMP_CASTED16]], align 4
// CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
// CHECK3-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
// CHECK3-NEXT: store i32 [[TMP69]], i32* [[TMP73]], align 4
// CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
// CHECK3-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32*
// CHECK3-NEXT: store i32 [[TMP69]], i32* [[TMP75]], align 4
// CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
// CHECK3-NEXT: store i8* null, i8** [[TMP76]], align 4
// CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 1
// CHECK3-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i32*
// CHECK3-NEXT: store i32 [[TMP71]], i32* [[TMP78]], align 4
// CHECK3-NEXT: [[TMP79:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 1
// CHECK3-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32*
// CHECK3-NEXT: store i32 [[TMP71]], i32* [[TMP80]], align 4
// CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 1
// CHECK3-NEXT: store i8* null, i8** [[TMP81]], align 4
// CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
// CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
// CHECK3-NEXT: [[TMP84:%.*]] = load i32, i32* [[LA]], align 4
// CHECK3-NEXT: [[KERNEL_ARGS20:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS20]], i32 0, i32 0
// CHECK3-NEXT: store i32 1, i32* [[TMP85]], align 4
// CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS20]], i32 0, i32 1
// CHECK3-NEXT: store i32 2, i32* [[TMP86]], align 4
// CHECK3-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS20]], i32 0, i32 2
// CHECK3-NEXT: store i8** [[TMP82]], i8*** [[TMP87]], align 4
// CHECK3-NEXT: [[TMP88:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS20]], i32 0, i32 3
// CHECK3-NEXT: store i8** [[TMP83]], i8*** [[TMP88]], align 4
// CHECK3-NEXT: [[TMP89:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS20]], i32 0, i32 4
// CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP89]], align 4
// CHECK3-NEXT: [[TMP90:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS20]], i32 0, i32 5
// CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP90]], align 4
// CHECK3-NEXT: [[TMP91:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS20]], i32 0, i32 6
// CHECK3-NEXT: store i8** null, i8*** [[TMP91]], align 4
// CHECK3-NEXT: [[TMP92:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS20]], i32 0, i32 7
// CHECK3-NEXT: store i8** null, i8*** [[TMP92]], align 4
// CHECK3-NEXT: [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS20]], i32 0, i32 8
// CHECK3-NEXT: store i64 0, i64* [[TMP93]], align 8
// CHECK3-NEXT: [[TMP94:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 [[TMP84]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l53.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS20]])
// CHECK3-NEXT: [[TMP95:%.*]] = icmp ne i32 [[TMP94]], 0
// CHECK3-NEXT: br i1 [[TMP95]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
// CHECK3: omp_offload.failed21:
// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l53(i32 [[TMP69]], i32 [[TMP71]]) #[[ATTR2]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT22]]
// CHECK3: omp_offload.cont22:
// CHECK3-NEXT: [[TMP96:%.*]] = load i32, i32* @Gbla, align 4
// CHECK3-NEXT: store i32 [[TMP96]], i32* [[GBLA_CASTED]], align 4
// CHECK3-NEXT: [[TMP97:%.*]] = load i32, i32* [[GBLA_CASTED]], align 4
// CHECK3-NEXT: [[TMP98:%.*]] = load i32, i32* [[A_ADDR]], align 4
// CHECK3-NEXT: store i32 [[TMP98]], i32* [[A_CASTED]], align 4
// CHECK3-NEXT: [[TMP99:%.*]] = load i32, i32* [[A_CASTED]], align 4
// CHECK3-NEXT: [[TMP100:%.*]] = load float, float* [[LC]], align 4
// CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[LC_CASTED]] to float*
// CHECK3-NEXT: store float [[TMP100]], float* [[CONV]], align 4
// CHECK3-NEXT: [[TMP101:%.*]] = load i32, i32* [[LC_CASTED]], align 4
// CHECK3-NEXT: [[TMP102:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK3-NEXT: store i32 [[TMP102]], i32* [[COMP_CASTED23]], align 4
// CHECK3-NEXT: [[TMP103:%.*]] = load i32, i32* [[COMP_CASTED23]], align 4
// CHECK3-NEXT: [[TMP104:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
// CHECK3-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32*
// CHECK3-NEXT: store i32 [[TMP97]], i32* [[TMP105]], align 4
// CHECK3-NEXT: [[TMP106:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
// CHECK3-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32*
// CHECK3-NEXT: store i32 [[TMP97]], i32* [[TMP107]], align 4
// CHECK3-NEXT: [[TMP108:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
// CHECK3-NEXT: store i8* null, i8** [[TMP108]], align 4
// CHECK3-NEXT: [[TMP109:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1
// CHECK3-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
// CHECK3-NEXT: store i32 [[TMP99]], i32* [[TMP110]], align 4
// CHECK3-NEXT: [[TMP111:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 1
// CHECK3-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32*
// CHECK3-NEXT: store i32 [[TMP99]], i32* [[TMP112]], align 4
// CHECK3-NEXT: [[TMP113:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 1
// CHECK3-NEXT: store i8* null, i8** [[TMP113]], align 4
// CHECK3-NEXT: [[TMP114:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 2
// CHECK3-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to i64**
// CHECK3-NEXT: store i64* @Gblb, i64** [[TMP115]], align 4
// CHECK3-NEXT: [[TMP116:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 2
// CHECK3-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i64**
// CHECK3-NEXT: store i64* @Gblb, i64** [[TMP117]], align 4
// CHECK3-NEXT: [[TMP118:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 2
// CHECK3-NEXT: store i8* null, i8** [[TMP118]], align 4
// CHECK3-NEXT: [[TMP119:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 3
// CHECK3-NEXT: [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32*
// CHECK3-NEXT: store i32 [[TMP101]], i32* [[TMP120]], align 4
// CHECK3-NEXT: [[TMP121:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 3
// CHECK3-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32*
// CHECK3-NEXT: store i32 [[TMP101]], i32* [[TMP122]], align 4
// CHECK3-NEXT: [[TMP123:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 3
// CHECK3-NEXT: store i8* null, i8** [[TMP123]], align 4
// CHECK3-NEXT: [[TMP124:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 4
// CHECK3-NEXT: [[TMP125:%.*]] = bitcast i8** [[TMP124]] to i32*
// CHECK3-NEXT: store i32 [[TMP103]], i32* [[TMP125]], align 4
// CHECK3-NEXT: [[TMP126:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 4
// CHECK3-NEXT: [[TMP127:%.*]] = bitcast i8** [[TMP126]] to i32*
// CHECK3-NEXT: store i32 [[TMP103]], i32* [[TMP127]], align 4
// CHECK3-NEXT: [[TMP128:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 4
// CHECK3-NEXT: store i8* null, i8** [[TMP128]], align 4
// CHECK3-NEXT: [[TMP129:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
// CHECK3-NEXT: [[TMP130:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
// CHECK3-NEXT: [[TMP131:%.*]] = load i32, i32* @Gbla, align 4
// CHECK3-NEXT: [[TMP132:%.*]] = load i32, i32* [[A_ADDR]], align 4
// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP131]], [[TMP132]]
// CHECK3-NEXT: [[TMP133:%.*]] = load i64, i64* @Gblb, align 8
// CHECK3-NEXT: [[TMP134:%.*]] = load float, float* [[LC]], align 4
// CHECK3-NEXT: [[CONV27:%.*]] = fptosi float [[TMP134]] to i64
// CHECK3-NEXT: [[ADD28:%.*]] = add nsw i64 [[TMP133]], [[CONV27]]
// CHECK3-NEXT: [[TMP135:%.*]] = trunc i64 [[ADD28]] to i32
// CHECK3-NEXT: [[KERNEL_ARGS29:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK3-NEXT: [[TMP136:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 0
// CHECK3-NEXT: store i32 1, i32* [[TMP136]], align 4
// CHECK3-NEXT: [[TMP137:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 1
// CHECK3-NEXT: store i32 5, i32* [[TMP137]], align 4
// CHECK3-NEXT: [[TMP138:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 2
// CHECK3-NEXT: store i8** [[TMP129]], i8*** [[TMP138]], align 4
// CHECK3-NEXT: [[TMP139:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 3
// CHECK3-NEXT: store i8** [[TMP130]], i8*** [[TMP139]], align 4
// CHECK3-NEXT: [[TMP140:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 4
// CHECK3-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_sizes.11, i32 0, i32 0), i64** [[TMP140]], align 4
// CHECK3-NEXT: [[TMP141:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 5
// CHECK3-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes.12, i32 0, i32 0), i64** [[TMP141]], align 4
// CHECK3-NEXT: [[TMP142:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 6
// CHECK3-NEXT: store i8** null, i8*** [[TMP142]], align 4
// CHECK3-NEXT: [[TMP143:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 7
// CHECK3-NEXT: store i8** null, i8*** [[TMP143]], align 4
// CHECK3-NEXT: [[TMP144:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]], i32 0, i32 8
// CHECK3-NEXT: store i64 0, i64* [[TMP144]], align 8
// CHECK3-NEXT: [[TMP145:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 [[ADD]], i32 [[TMP135]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l62.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS29]])
// CHECK3-NEXT: [[TMP146:%.*]] = icmp ne i32 [[TMP145]], 0
// CHECK3-NEXT: br i1 [[TMP146]], label [[OMP_OFFLOAD_FAILED30:%.*]], label [[OMP_OFFLOAD_CONT31:%.*]]
// CHECK3: omp_offload.failed30:
// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l62(i32 [[TMP97]], i32 [[TMP99]], i64* @Gblb, i32 [[TMP101]], i32 [[TMP103]]) #[[ATTR2]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT31]]
// CHECK3: omp_offload.cont31:
// CHECK3-NEXT: [[TMP147:%.*]] = load i32*, i32** @Gblc, align 4
// CHECK3-NEXT: store i32* [[TMP147]], i32** [[TMP]], align 4
// CHECK3-NEXT: [[TMP148:%.*]] = load i32, i32* @Gbla, align 4
// CHECK3-NEXT: store i32 [[TMP148]], i32* [[GBLC_CASTED]], align 4
// CHECK3-NEXT: [[TMP149:%.*]] = load i32, i32* [[GBLC_CASTED]], align 4
// CHECK3-NEXT: [[TMP150:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK3-NEXT: store i32 [[TMP150]], i32* [[COMP_CASTED32]], align 4
// CHECK3-NEXT: [[TMP151:%.*]] = load i32, i32* [[COMP_CASTED32]], align 4
// CHECK3-NEXT: [[TMP152:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
// CHECK3-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
// CHECK3-NEXT: store i32 [[TMP149]], i32* [[TMP153]], align 4
// CHECK3-NEXT: [[TMP154:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
// CHECK3-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
// CHECK3-NEXT: store i32 [[TMP149]], i32* [[TMP155]], align 4
// CHECK3-NEXT: [[TMP156:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 0
// CHECK3-NEXT: store i8* null, i8** [[TMP156]], align 4
// CHECK3-NEXT: [[TMP157:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 1
// CHECK3-NEXT: [[TMP158:%.*]] = bitcast i8** [[TMP157]] to i32*
// CHECK3-NEXT: store i32 [[TMP151]], i32* [[TMP158]], align 4
// CHECK3-NEXT: [[TMP159:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 1
// CHECK3-NEXT: [[TMP160:%.*]] = bitcast i8** [[TMP159]] to i32*
// CHECK3-NEXT: store i32 [[TMP151]], i32* [[TMP160]], align 4
// CHECK3-NEXT: [[TMP161:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS35]], i32 0, i32 1
// CHECK3-NEXT: store i8* null, i8** [[TMP161]], align 4
// CHECK3-NEXT: [[TMP162:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS33]], i32 0, i32 0
// CHECK3-NEXT: [[TMP163:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS34]], i32 0, i32 0
// CHECK3-NEXT: [[TMP164:%.*]] = load i32*, i32** @Gblc, align 4
// CHECK3-NEXT: store i32* [[TMP164]], i32** [[_TMP36]], align 4
// CHECK3-NEXT: [[TMP165:%.*]] = load i32, i32* @Gbla, align 4
// CHECK3-NEXT: [[ADD37:%.*]] = add nsw i32 [[TMP165]], 1
// CHECK3-NEXT: [[TMP166:%.*]] = load i32*, i32** @Gblc, align 4
// CHECK3-NEXT: store i32* [[TMP166]], i32** [[_TMP38]], align 4
// CHECK3-NEXT: [[TMP167:%.*]] = load i32, i32* @Gbla, align 4
// CHECK3-NEXT: [[ADD39:%.*]] = add nsw i32 [[TMP167]], 2
// CHECK3-NEXT: [[KERNEL_ARGS40:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK3-NEXT: [[TMP168:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS40]], i32 0, i32 0
// CHECK3-NEXT: store i32 1, i32* [[TMP168]], align 4
// CHECK3-NEXT: [[TMP169:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS40]], i32 0, i32 1
// CHECK3-NEXT: store i32 2, i32* [[TMP169]], align 4
// CHECK3-NEXT: [[TMP170:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS40]], i32 0, i32 2
// CHECK3-NEXT: store i8** [[TMP162]], i8*** [[TMP170]], align 4
// CHECK3-NEXT: [[TMP171:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS40]], i32 0, i32 3
// CHECK3-NEXT: store i8** [[TMP163]], i8*** [[TMP171]], align 4
// CHECK3-NEXT: [[TMP172:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS40]], i32 0, i32 4
// CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.14, i32 0, i32 0), i64** [[TMP172]], align 4
// CHECK3-NEXT: [[TMP173:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS40]], i32 0, i32 5
// CHECK3-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.15, i32 0, i32 0), i64** [[TMP173]], align 4
// CHECK3-NEXT: [[TMP174:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS40]], i32 0, i32 6
// CHECK3-NEXT: store i8** null, i8*** [[TMP174]], align 4
// CHECK3-NEXT: [[TMP175:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS40]], i32 0, i32 7
// CHECK3-NEXT: store i8** null, i8*** [[TMP175]], align 4
// CHECK3-NEXT: [[TMP176:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS40]], i32 0, i32 8
// CHECK3-NEXT: store i64 0, i64* [[TMP176]], align 8
// CHECK3-NEXT: [[TMP177:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 [[ADD37]], i32 [[ADD39]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l71.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS40]])
// CHECK3-NEXT: [[TMP178:%.*]] = icmp ne i32 [[TMP177]], 0
// CHECK3-NEXT: br i1 [[TMP178]], label [[OMP_OFFLOAD_FAILED41:%.*]], label [[OMP_OFFLOAD_CONT42:%.*]]
// CHECK3: omp_offload.failed41:
// CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l71(i32 [[TMP149]], i32 [[TMP151]]) #[[ATTR2]]
// CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT42]]
// CHECK3: omp_offload.cont42:
// CHECK3-NEXT: [[TMP179:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK3-NEXT: ret i32 [[TMP179]]
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l31
// CHECK3-SAME: (i32 noundef [[COMP:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: store i32 [[COMP]], i32* [[COMP_ADDR]], align 4
// CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[COMP_ADDR]])
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK3-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l37
// CHECK3-SAME: (i32 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: store i32 [[COMP]], i32* [[COMP_ADDR]], align 4
// CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[COMP_ADDR]])
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
// CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK3-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l46
// CHECK3-SAME: (i32 noundef [[LA:%.*]], i32 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[LA_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK3-NEXT: store i32 [[LA]], i32* [[LA_ADDR]], align 4
// CHECK3-NEXT: store i32 [[COMP]], i32* [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[LA_ADDR]], align 4
// CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 0)
// CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32* [[COMP_ADDR]])
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
// CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK3-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l53
// CHECK3-SAME: (i32 noundef [[LA:%.*]], i32 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[LA_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK3-NEXT: store i32 [[LA]], i32* [[LA_ADDR]], align 4
// CHECK3-NEXT: store i32 [[COMP]], i32* [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[LA_ADDR]], align 4
// CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 0, i32 [[TMP1]])
// CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32* [[COMP_ADDR]])
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
// CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK3-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l62
// CHECK3-SAME: (i32 noundef [[GBLA:%.*]], i32 noundef [[A:%.*]], i64* noundef nonnull align 4 dereferenceable(8) [[GBLB:%.*]], i32 noundef [[LC:%.*]], i32 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[GBLA_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[GBLB_ADDR:%.*]] = alloca i64*, align 4
// CHECK3-NEXT: [[LC_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[GBLB1:%.*]] = alloca i64, align 8
// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK3-NEXT: store i32 [[GBLA]], i32* [[GBLA_ADDR]], align 4
// CHECK3-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
// CHECK3-NEXT: store i64* [[GBLB]], i64** [[GBLB_ADDR]], align 4
// CHECK3-NEXT: store i32 [[LC]], i32* [[LC_ADDR]], align 4
// CHECK3-NEXT: store i32 [[COMP]], i32* [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i64*, i64** [[GBLB_ADDR]], align 4
// CHECK3-NEXT: [[CONV:%.*]] = bitcast i32* [[LC_ADDR]] to float*
// CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[TMP1]], align 8
// CHECK3-NEXT: store i64 [[TMP2]], i64* [[GBLB1]], align 8
// CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[GBLA_ADDR]], align 4
// CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[A_ADDR]], align 4
// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[TMP4]]
// CHECK3-NEXT: [[TMP5:%.*]] = load i64, i64* [[GBLB1]], align 8
// CHECK3-NEXT: [[TMP6:%.*]] = load float, float* [[CONV]], align 4
// CHECK3-NEXT: [[CONV2:%.*]] = fptosi float [[TMP6]] to i64
// CHECK3-NEXT: [[ADD3:%.*]] = add nsw i64 [[TMP5]], [[CONV2]]
// CHECK3-NEXT: [[TMP7:%.*]] = trunc i64 [[ADD3]] to i32
// CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[ADD]], i32 [[TMP7]])
// CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[COMP_ADDR]])
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
// CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK3-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z27teams_argument_global_locali_l71
// CHECK3-SAME: (i32 noundef [[GBLC:%.*]], i32 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[GBLC_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32, align 4
// CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK3-NEXT: store i32 [[GBLC]], i32* [[GBLC_ADDR]], align 4
// CHECK3-NEXT: store i32 [[COMP]], i32* [[COMP_ADDR]], align 4
// CHECK3-NEXT: store i32* [[GBLC_ADDR]], i32** [[TMP]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* @Gbla, align 4
// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* @Gbla, align 4
// CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP2]], 2
// CHECK3-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[ADD]], i32 [[ADD1]])
// CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 4
// CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*), i32* [[COMP_ADDR]], i32* [[TMP3]])
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..13
// CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[GBLC:%.*]]) #[[ATTR1]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[GBLC_ADDR:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 4
// CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK3-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: store i32* [[GBLC]], i32** [[GBLC_ADDR]], align 4
// CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 4
// CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[GBLC_ADDR]], align 4
// CHECK3-NEXT: store i32* [[TMP1]], i32** [[TMP]], align 4
// CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* @Gbla, align 4
// CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[TMP2]]
// CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP0]], align 4
// CHECK3-NEXT: ret void
//
//
// CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
// CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
// CHECK3-NEXT: entry:
// CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
// CHECK3-NEXT: ret void
//
//
// CHECK9-LABEL: define {{[^@]+}}@_Z18teams_template_argv
// CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[COMP:%.*]] = alloca i32, align 4
// CHECK9-NEXT: [[LA:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
// CHECK9-NEXT: [[LB:%.*]] = alloca [[STRUCT_SS_0:%.*]], align 8
// CHECK9-NEXT: [[COMP_CASTED:%.*]] = alloca i64, align 8
// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
// CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
// CHECK9-NEXT: [[COMP_CASTED2:%.*]] = alloca i64, align 8
// CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 8
// CHECK9-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 8
// CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 8
// CHECK9-NEXT: store i32 1, i32* [[COMP]], align 4
// CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[COMP_CASTED]] to i32*
// CHECK9-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
// CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[COMP_CASTED]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS**
// CHECK9-NEXT: store %struct.SS* @Gbla, %struct.SS** [[TMP3]], align 8
// CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to %struct.SS**
// CHECK9-NEXT: store %struct.SS* @Gbla, %struct.SS** [[TMP5]], align 8
// CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
// CHECK9-NEXT: store i8* null, i8** [[TMP6]], align 8
// CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
// CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to %struct.SS**
// CHECK9-NEXT: store %struct.SS* [[LA]], %struct.SS** [[TMP8]], align 8
// CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
// CHECK9-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
// CHECK9-NEXT: store %struct.SS* [[LA]], %struct.SS** [[TMP10]], align 8
// CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
// CHECK9-NEXT: store i8* null, i8** [[TMP11]], align 8
// CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
// CHECK9-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
// CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
// CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
// CHECK9-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
// CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
// CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
// CHECK9-NEXT: store i8* null, i8** [[TMP16]], align 8
// CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_SS]], %struct.SS* @Gbla, i32 0, i32 0), align 4
// CHECK9-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[LA]], i32 0, i32 1
// CHECK9-NEXT: [[TMP20:%.*]] = load float, float* [[B]], align 4
// CHECK9-NEXT: [[CONV1:%.*]] = fptosi float [[TMP20]] to i64
// CHECK9-NEXT: [[TMP21:%.*]] = trunc i64 [[CONV1]] to i32
// CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
// CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
// CHECK9-NEXT: store i32 1, i32* [[TMP22]], align 4
// CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
// CHECK9-NEXT: store i32 3, i32* [[TMP23]], align 4
// CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
// CHECK9-NEXT: store i8** [[TMP17]], i8*** [[TMP24]], align 8
// CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
// CHECK9-NEXT: store i8** [[TMP18]], i8*** [[TMP25]], align 8
// CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
// CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP26]], align 8
// CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
// CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP27]], align 8
// CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
// CHECK9-NEXT: store i8** null, i8*** [[TMP28]], align 8
// CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
// CHECK9-NEXT: store i8** null, i8*** [[TMP29]], align 8
// CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
// CHECK9-NEXT: store i64 0, i64* [[TMP30]], align 8
// CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 [[TMP19]], i32 [[TMP21]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
// CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
// CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK9: omp_offload.failed:
// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l116(%struct.SS* @Gbla, %struct.SS* [[LA]], i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK9: omp_offload.cont:
// CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[COMP_CASTED2]] to i32*
// CHECK9-NEXT: store i32 [[TMP33]], i32* [[CONV3]], align 4
// CHECK9-NEXT: [[TMP34:%.*]] = load i64, i64* [[COMP_CASTED2]], align 8
// CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
// CHECK9-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to %struct.SS.0**
// CHECK9-NEXT: store %struct.SS.0* [[LB]], %struct.SS.0** [[TMP36]], align 8
// CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
// CHECK9-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to %struct.SS.0**
// CHECK9-NEXT: store %struct.SS.0* [[LB]], %struct.SS.0** [[TMP38]], align 8
// CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
// CHECK9-NEXT: store i8* null, i8** [[TMP39]], align 8
// CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
// CHECK9-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to %struct.SS.0**
// CHECK9-NEXT: store %struct.SS.0* @Gblb, %struct.SS.0** [[TMP41]], align 8
// CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
// CHECK9-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to %struct.SS.0**
// CHECK9-NEXT: store %struct.SS.0* @Gblb, %struct.SS.0** [[TMP43]], align 8
// CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1
// CHECK9-NEXT: store i8* null, i8** [[TMP44]], align 8
// CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
// CHECK9-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
// CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP46]], align 8
// CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
// CHECK9-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
// CHECK9-NEXT: store i64 [[TMP34]], i64* [[TMP48]], align 8
// CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2
// CHECK9-NEXT: store i8* null, i8** [[TMP49]], align 8
// CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
// CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
// CHECK9-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS_0]], %struct.SS.0* [[LB]], i32 0, i32 1
// CHECK9-NEXT: [[TMP52:%.*]] = load float, float* [[B7]], align 8
// CHECK9-NEXT: [[CONV8:%.*]] = fptosi float [[TMP52]] to i64
// CHECK9-NEXT: [[TMP53:%.*]] = trunc i64 [[CONV8]] to i32
// CHECK9-NEXT: [[TMP54:%.*]] = load i64, i64* getelementptr inbounds ([[STRUCT_SS_0]], %struct.SS.0* @Gblb, i32 0, i32 0), align 8
// CHECK9-NEXT: [[TMP55:%.*]] = trunc i64 [[TMP54]] to i32
// CHECK9-NEXT: [[KERNEL_ARGS9:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK9-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS9]], i32 0, i32 0
// CHECK9-NEXT: store i32 1, i32* [[TMP56]], align 4
// CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS9]], i32 0, i32 1
// CHECK9-NEXT: store i32 3, i32* [[TMP57]], align 4
// CHECK9-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS9]], i32 0, i32 2
// CHECK9-NEXT: store i8** [[TMP50]], i8*** [[TMP58]], align 8
// CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS9]], i32 0, i32 3
// CHECK9-NEXT: store i8** [[TMP51]], i8*** [[TMP59]], align 8
// CHECK9-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS9]], i32 0, i32 4
// CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP60]], align 8
// CHECK9-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS9]], i32 0, i32 5
// CHECK9-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP61]], align 8
// CHECK9-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS9]], i32 0, i32 6
// CHECK9-NEXT: store i8** null, i8*** [[TMP62]], align 8
// CHECK9-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS9]], i32 0, i32 7
// CHECK9-NEXT: store i8** null, i8*** [[TMP63]], align 8
// CHECK9-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS9]], i32 0, i32 8
// CHECK9-NEXT: store i64 0, i64* [[TMP64]], align 8
// CHECK9-NEXT: [[TMP65:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 [[TMP53]], i32 [[TMP55]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l125.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS9]])
// CHECK9-NEXT: [[TMP66:%.*]] = icmp ne i32 [[TMP65]], 0
// CHECK9-NEXT: br i1 [[TMP66]], label [[OMP_OFFLOAD_FAILED10:%.*]], label [[OMP_OFFLOAD_CONT11:%.*]]
// CHECK9: omp_offload.failed10:
// CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l125(%struct.SS.0* [[LB]], %struct.SS.0* @Gblb, i64 [[TMP34]]) #[[ATTR2]]
// CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT11]]
// CHECK9: omp_offload.cont11:
// CHECK9-NEXT: [[TMP67:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK9-NEXT: ret i32 [[TMP67]]
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l116
// CHECK9-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(8) [[GBLA:%.*]], %struct.SS* noundef nonnull align 4 dereferenceable(8) [[LA:%.*]], i64 noundef [[COMP:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[GBLA_ADDR:%.*]] = alloca %struct.SS*, align 8
// CHECK9-NEXT: [[LA_ADDR:%.*]] = alloca %struct.SS*, align 8
// CHECK9-NEXT: [[COMP_ADDR:%.*]] = alloca i64, align 8
// CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK9-NEXT: store %struct.SS* [[GBLA]], %struct.SS** [[GBLA_ADDR]], align 8
// CHECK9-NEXT: store %struct.SS* [[LA]], %struct.SS** [[LA_ADDR]], align 8
// CHECK9-NEXT: store i64 [[COMP]], i64* [[COMP_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[GBLA_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[LA_ADDR]], align 8
// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[COMP_ADDR]] to i32*
// CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
// CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4
// CHECK9-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP2]], i32 0, i32 1
// CHECK9-NEXT: [[TMP4:%.*]] = load float, float* [[B]], align 4
// CHECK9-NEXT: [[CONV1:%.*]] = fptosi float [[TMP4]] to i64
// CHECK9-NEXT: [[TMP5:%.*]] = trunc i64 [[CONV1]] to i32
// CHECK9-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP3]], i32 [[TMP5]])
// CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
// CHECK9-NEXT: ret void
//
//
// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK9-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 8
// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK9-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 8
// CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK9-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK9-NEXT: ret void
//
//
// CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l125
// CHECK9-SAME: (%struct.SS.0* noundef nonnull align 8 dereferenceable(16) [[LB:%.*]], %struct.SS.0* noundef nonnull align 8 dereferenceable(16) [[GBLB:%.*]], i64 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[LB_ADDR:%.*]] = alloca %struct.SS.0*, align 8
// CHECK9-NEXT: [[GBLB_ADDR:%.*]] = alloca %struct.SS.0*, align 8
// CHECK9-NEXT: [[COMP_ADDR:%.*]] = alloca i64, align 8
// CHECK9-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK9-NEXT: store %struct.SS.0* [[LB]], %struct.SS.0** [[LB_ADDR]], align 8
// CHECK9-NEXT: store %struct.SS.0* [[GBLB]], %struct.SS.0** [[GBLB_ADDR]], align 8
// CHECK9-NEXT: store i64 [[COMP]], i64* [[COMP_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load %struct.SS.0*, %struct.SS.0** [[LB_ADDR]], align 8
// CHECK9-NEXT: [[TMP2:%.*]] = load %struct.SS.0*, %struct.SS.0** [[GBLB_ADDR]], align 8
// CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[COMP_ADDR]] to i32*
// CHECK9-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS_0:%.*]], %struct.SS.0* [[TMP1]], i32 0, i32 1
// CHECK9-NEXT: [[TMP3:%.*]] = load float, float* [[B]], align 8
// CHECK9-NEXT: [[CONV1:%.*]] = fptosi float [[TMP3]] to i64
// CHECK9-NEXT: [[TMP4:%.*]] = trunc i64 [[CONV1]] to i32
// CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS_0]], %struct.SS.0* [[TMP2]], i32 0, i32 0
// CHECK9-NEXT: [[TMP5:%.*]] = load i64, i64* [[A]], align 8
// CHECK9-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i32
// CHECK9-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP4]], i32 [[TMP6]])
// CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]])
// CHECK9-NEXT: ret void
//
//
// CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
// CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK9-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 8
// CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK9-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 8
// CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 8
// CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK9-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK9-NEXT: ret void
//
//
// CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
// CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
// CHECK9-NEXT: entry:
// CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
// CHECK9-NEXT: ret void
//
//
// CHECK11-LABEL: define {{[^@]+}}@_Z18teams_template_argv
// CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[COMP:%.*]] = alloca i32, align 4
// CHECK11-NEXT: [[LA:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
// CHECK11-NEXT: [[LB:%.*]] = alloca [[STRUCT_SS_0:%.*]], align 4
// CHECK11-NEXT: [[COMP_CASTED:%.*]] = alloca i32, align 4
// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
// CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
// CHECK11-NEXT: [[COMP_CASTED1:%.*]] = alloca i32, align 4
// CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS2:%.*]] = alloca [3 x i8*], align 4
// CHECK11-NEXT: [[DOTOFFLOAD_PTRS3:%.*]] = alloca [3 x i8*], align 4
// CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS4:%.*]] = alloca [3 x i8*], align 4
// CHECK11-NEXT: store i32 1, i32* [[COMP]], align 4
// CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK11-NEXT: store i32 [[TMP0]], i32* [[COMP_CASTED]], align 4
// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[COMP_CASTED]], align 4
// CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS**
// CHECK11-NEXT: store %struct.SS* @Gbla, %struct.SS** [[TMP3]], align 4
// CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK11-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to %struct.SS**
// CHECK11-NEXT: store %struct.SS* @Gbla, %struct.SS** [[TMP5]], align 4
// CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
// CHECK11-NEXT: store i8* null, i8** [[TMP6]], align 4
// CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
// CHECK11-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to %struct.SS**
// CHECK11-NEXT: store %struct.SS* [[LA]], %struct.SS** [[TMP8]], align 4
// CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
// CHECK11-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
// CHECK11-NEXT: store %struct.SS* [[LA]], %struct.SS** [[TMP10]], align 4
// CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
// CHECK11-NEXT: store i8* null, i8** [[TMP11]], align 4
// CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
// CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
// CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP13]], align 4
// CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
// CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
// CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP15]], align 4
// CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
// CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
// CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* getelementptr inbounds ([[STRUCT_SS]], %struct.SS* @Gbla, i32 0, i32 0), align 4
// CHECK11-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[LA]], i32 0, i32 1
// CHECK11-NEXT: [[TMP20:%.*]] = load float, float* [[B]], align 4
// CHECK11-NEXT: [[CONV:%.*]] = fptosi float [[TMP20]] to i64
// CHECK11-NEXT: [[TMP21:%.*]] = trunc i64 [[CONV]] to i32
// CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
// CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
// CHECK11-NEXT: store i32 1, i32* [[TMP22]], align 4
// CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
// CHECK11-NEXT: store i32 3, i32* [[TMP23]], align 4
// CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
// CHECK11-NEXT: store i8** [[TMP17]], i8*** [[TMP24]], align 4
// CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
// CHECK11-NEXT: store i8** [[TMP18]], i8*** [[TMP25]], align 4
// CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
// CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP26]], align 4
// CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
// CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP27]], align 4
// CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
// CHECK11-NEXT: store i8** null, i8*** [[TMP28]], align 4
// CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
// CHECK11-NEXT: store i8** null, i8*** [[TMP29]], align 4
// CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
// CHECK11-NEXT: store i64 0, i64* [[TMP30]], align 8
// CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 [[TMP19]], i32 [[TMP21]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
// CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
// CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK11: omp_offload.failed:
// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l116(%struct.SS* @Gbla, %struct.SS* [[LA]], i32 [[TMP1]]) #[[ATTR2:[0-9]+]]
// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK11: omp_offload.cont:
// CHECK11-NEXT: [[TMP33:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK11-NEXT: store i32 [[TMP33]], i32* [[COMP_CASTED1]], align 4
// CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[COMP_CASTED1]], align 4
// CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
// CHECK11-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to %struct.SS.0**
// CHECK11-NEXT: store %struct.SS.0* [[LB]], %struct.SS.0** [[TMP36]], align 4
// CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
// CHECK11-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to %struct.SS.0**
// CHECK11-NEXT: store %struct.SS.0* [[LB]], %struct.SS.0** [[TMP38]], align 4
// CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 0
// CHECK11-NEXT: store i8* null, i8** [[TMP39]], align 4
// CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 1
// CHECK11-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to %struct.SS.0**
// CHECK11-NEXT: store %struct.SS.0* @Gblb, %struct.SS.0** [[TMP41]], align 4
// CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 1
// CHECK11-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to %struct.SS.0**
// CHECK11-NEXT: store %struct.SS.0* @Gblb, %struct.SS.0** [[TMP43]], align 4
// CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 1
// CHECK11-NEXT: store i8* null, i8** [[TMP44]], align 4
// CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 2
// CHECK11-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
// CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP46]], align 4
// CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 2
// CHECK11-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
// CHECK11-NEXT: store i32 [[TMP34]], i32* [[TMP48]], align 4
// CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS4]], i32 0, i32 2
// CHECK11-NEXT: store i8* null, i8** [[TMP49]], align 4
// CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS2]], i32 0, i32 0
// CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS3]], i32 0, i32 0
// CHECK11-NEXT: [[B5:%.*]] = getelementptr inbounds [[STRUCT_SS_0]], %struct.SS.0* [[LB]], i32 0, i32 1
// CHECK11-NEXT: [[TMP52:%.*]] = load float, float* [[B5]], align 4
// CHECK11-NEXT: [[CONV6:%.*]] = fptosi float [[TMP52]] to i64
// CHECK11-NEXT: [[TMP53:%.*]] = trunc i64 [[CONV6]] to i32
// CHECK11-NEXT: [[TMP54:%.*]] = load i64, i64* getelementptr inbounds ([[STRUCT_SS_0]], %struct.SS.0* @Gblb, i32 0, i32 0), align 4
// CHECK11-NEXT: [[TMP55:%.*]] = trunc i64 [[TMP54]] to i32
// CHECK11-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
// CHECK11-NEXT: store i32 1, i32* [[TMP56]], align 4
// CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
// CHECK11-NEXT: store i32 3, i32* [[TMP57]], align 4
// CHECK11-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
// CHECK11-NEXT: store i8** [[TMP50]], i8*** [[TMP58]], align 4
// CHECK11-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
// CHECK11-NEXT: store i8** [[TMP51]], i8*** [[TMP59]], align 4
// CHECK11-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
// CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP60]], align 4
// CHECK11-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
// CHECK11-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP61]], align 4
// CHECK11-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
// CHECK11-NEXT: store i8** null, i8*** [[TMP62]], align 4
// CHECK11-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
// CHECK11-NEXT: store i8** null, i8*** [[TMP63]], align 4
// CHECK11-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
// CHECK11-NEXT: store i64 0, i64* [[TMP64]], align 8
// CHECK11-NEXT: [[TMP65:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 [[TMP53]], i32 [[TMP55]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l125.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
// CHECK11-NEXT: [[TMP66:%.*]] = icmp ne i32 [[TMP65]], 0
// CHECK11-NEXT: br i1 [[TMP66]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
// CHECK11: omp_offload.failed8:
// CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l125(%struct.SS.0* [[LB]], %struct.SS.0* @Gblb, i32 [[TMP34]]) #[[ATTR2]]
// CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT9]]
// CHECK11: omp_offload.cont9:
// CHECK11-NEXT: [[TMP67:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK11-NEXT: ret i32 [[TMP67]]
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l116
// CHECK11-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(8) [[GBLA:%.*]], %struct.SS* noundef nonnull align 4 dereferenceable(8) [[LA:%.*]], i32 noundef [[COMP:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[GBLA_ADDR:%.*]] = alloca %struct.SS*, align 4
// CHECK11-NEXT: [[LA_ADDR:%.*]] = alloca %struct.SS*, align 4
// CHECK11-NEXT: [[COMP_ADDR:%.*]] = alloca i32, align 4
// CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK11-NEXT: store %struct.SS* [[GBLA]], %struct.SS** [[GBLA_ADDR]], align 4
// CHECK11-NEXT: store %struct.SS* [[LA]], %struct.SS** [[LA_ADDR]], align 4
// CHECK11-NEXT: store i32 [[COMP]], i32* [[COMP_ADDR]], align 4
// CHECK11-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[GBLA_ADDR]], align 4
// CHECK11-NEXT: [[TMP2:%.*]] = load %struct.SS*, %struct.SS** [[LA_ADDR]], align 4
// CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
// CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[A]], align 4
// CHECK11-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[TMP2]], i32 0, i32 1
// CHECK11-NEXT: [[TMP4:%.*]] = load float, float* [[B]], align 4
// CHECK11-NEXT: [[CONV:%.*]] = fptosi float [[TMP4]] to i64
// CHECK11-NEXT: [[TMP5:%.*]] = trunc i64 [[CONV]] to i32
// CHECK11-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP3]], i32 [[TMP5]])
// CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[COMP_ADDR]])
// CHECK11-NEXT: ret void
//
//
// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK11-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 4
// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK11-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 4
// CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 4
// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK11-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK11-NEXT: ret void
//
//
// CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18teams_template_argv_l125
// CHECK11-SAME: (%struct.SS.0* noundef nonnull align 4 dereferenceable(12) [[LB:%.*]], %struct.SS.0* noundef nonnull align 4 dereferenceable(12) [[GBLB:%.*]], i32 noundef [[COMP:%.*]]) #[[ATTR1]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[LB_ADDR:%.*]] = alloca %struct.SS.0*, align 4
// CHECK11-NEXT: [[GBLB_ADDR:%.*]] = alloca %struct.SS.0*, align 4
// CHECK11-NEXT: [[COMP_ADDR:%.*]] = alloca i32, align 4
// CHECK11-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK11-NEXT: store %struct.SS.0* [[LB]], %struct.SS.0** [[LB_ADDR]], align 4
// CHECK11-NEXT: store %struct.SS.0* [[GBLB]], %struct.SS.0** [[GBLB_ADDR]], align 4
// CHECK11-NEXT: store i32 [[COMP]], i32* [[COMP_ADDR]], align 4
// CHECK11-NEXT: [[TMP1:%.*]] = load %struct.SS.0*, %struct.SS.0** [[LB_ADDR]], align 4
// CHECK11-NEXT: [[TMP2:%.*]] = load %struct.SS.0*, %struct.SS.0** [[GBLB_ADDR]], align 4
// CHECK11-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS_0:%.*]], %struct.SS.0* [[TMP1]], i32 0, i32 1
// CHECK11-NEXT: [[TMP3:%.*]] = load float, float* [[B]], align 4
// CHECK11-NEXT: [[CONV:%.*]] = fptosi float [[TMP3]] to i64
// CHECK11-NEXT: [[TMP4:%.*]] = trunc i64 [[CONV]] to i32
// CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS_0]], %struct.SS.0* [[TMP2]], i32 0, i32 0
// CHECK11-NEXT: [[TMP5:%.*]] = load i64, i64* [[A]], align 4
// CHECK11-NEXT: [[TMP6:%.*]] = trunc i64 [[TMP5]] to i32
// CHECK11-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP4]], i32 [[TMP6]])
// CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[COMP_ADDR]])
// CHECK11-NEXT: ret void
//
//
// CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
// CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK11-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 4
// CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK11-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 4
// CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 4
// CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK11-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK11-NEXT: ret void
//
//
// CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
// CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
// CHECK11-NEXT: entry:
// CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
// CHECK11-NEXT: ret void
//
//
// CHECK17-LABEL: define {{[^@]+}}@_Z21teams_template_structv
// CHECK17-SAME: () #[[ATTR0:[0-9]+]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
// CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(8) [[V]])
// CHECK17-NEXT: ret i32 [[CALL]]
//
//
// CHECK17-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
// CHECK17-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
// CHECK17-NEXT: [[COMP:%.*]] = alloca i32, align 4
// CHECK17-NEXT: [[COMP_CASTED:%.*]] = alloca i64, align 8
// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 8
// CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 8
// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 8
// CHECK17-NEXT: [[COMP_CASTED3:%.*]] = alloca i64, align 8
// CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [2 x i8*], align 8
// CHECK17-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [2 x i8*], align 8
// CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [2 x i8*], align 8
// CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
// CHECK17-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
// CHECK17-NEXT: store i32 1, i32* [[COMP]], align 4
// CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[COMP_CASTED]] to i32*
// CHECK17-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
// CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[COMP_CASTED]], align 8
// CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
// CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS**
// CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP3]], align 8
// CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK17-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32**
// CHECK17-NEXT: store i32* [[A]], i32** [[TMP5]], align 8
// CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
// CHECK17-NEXT: store i8* null, i8** [[TMP6]], align 8
// CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
// CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
// CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP8]], align 8
// CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
// CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
// CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP10]], align 8
// CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
// CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 8
// CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK17-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
// CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[A2]], align 4
// CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
// CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
// CHECK17-NEXT: store i32 1, i32* [[TMP15]], align 4
// CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
// CHECK17-NEXT: store i32 2, i32* [[TMP16]], align 4
// CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
// CHECK17-NEXT: store i8** [[TMP12]], i8*** [[TMP17]], align 8
// CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
// CHECK17-NEXT: store i8** [[TMP13]], i8*** [[TMP18]], align 8
// CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
// CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP19]], align 8
// CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
// CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP20]], align 8
// CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
// CHECK17-NEXT: store i8** null, i8*** [[TMP21]], align 8
// CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
// CHECK17-NEXT: store i8** null, i8*** [[TMP22]], align 8
// CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
// CHECK17-NEXT: store i64 0, i64* [[TMP23]], align 8
// CHECK17-NEXT: [[TMP24:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 [[TMP14]], i32 123, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l161.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
// CHECK17-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
// CHECK17-NEXT: br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK17: omp_offload.failed:
// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l161(%struct.SS* [[THIS1]], i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK17: omp_offload.cont:
// CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[COMP_CASTED3]] to i32*
// CHECK17-NEXT: store i32 [[TMP26]], i32* [[CONV4]], align 4
// CHECK17-NEXT: [[TMP27:%.*]] = load i64, i64* [[COMP_CASTED3]], align 8
// CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
// CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
// CHECK17-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to %struct.SS**
// CHECK17-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP29]], align 8
// CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
// CHECK17-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to float**
// CHECK17-NEXT: store float* [[B]], float** [[TMP31]], align 8
// CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
// CHECK17-NEXT: store i8* null, i8** [[TMP32]], align 8
// CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
// CHECK17-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i64*
// CHECK17-NEXT: store i64 [[TMP27]], i64* [[TMP34]], align 8
// CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
// CHECK17-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i64*
// CHECK17-NEXT: store i64 [[TMP27]], i64* [[TMP36]], align 8
// CHECK17-NEXT: [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
// CHECK17-NEXT: store i8* null, i8** [[TMP37]], align 8
// CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
// CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
// CHECK17-NEXT: [[B8:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
// CHECK17-NEXT: [[TMP40:%.*]] = load float, float* [[B8]], align 4
// CHECK17-NEXT: [[CONV9:%.*]] = fptosi float [[TMP40]] to i32
// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV9]], 123
// CHECK17-NEXT: [[KERNEL_ARGS10:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS10]], i32 0, i32 0
// CHECK17-NEXT: store i32 1, i32* [[TMP41]], align 4
// CHECK17-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS10]], i32 0, i32 1
// CHECK17-NEXT: store i32 2, i32* [[TMP42]], align 4
// CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS10]], i32 0, i32 2
// CHECK17-NEXT: store i8** [[TMP38]], i8*** [[TMP43]], align 8
// CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS10]], i32 0, i32 3
// CHECK17-NEXT: store i8** [[TMP39]], i8*** [[TMP44]], align 8
// CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS10]], i32 0, i32 4
// CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP45]], align 8
// CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS10]], i32 0, i32 5
// CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP46]], align 8
// CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS10]], i32 0, i32 6
// CHECK17-NEXT: store i8** null, i8*** [[TMP47]], align 8
// CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS10]], i32 0, i32 7
// CHECK17-NEXT: store i8** null, i8*** [[TMP48]], align 8
// CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS10]], i32 0, i32 8
// CHECK17-NEXT: store i64 0, i64* [[TMP49]], align 8
// CHECK17-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 456, i32 [[ADD]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l169.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS10]])
// CHECK17-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
// CHECK17-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
// CHECK17: omp_offload.failed11:
// CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l169(%struct.SS* [[THIS1]], i64 [[TMP27]]) #[[ATTR2]]
// CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT12]]
// CHECK17: omp_offload.cont12:
// CHECK17-NEXT: [[TMP52:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK17-NEXT: ret i32 [[TMP52]]
//
//
// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l161
// CHECK17-SAME: (%struct.SS* noundef [[THIS:%.*]], i64 noundef [[COMP:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
// CHECK17-NEXT: [[COMP_ADDR:%.*]] = alloca i64, align 8
// CHECK17-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
// CHECK17-NEXT: store i64 [[COMP]], i64* [[COMP_ADDR]], align 8
// CHECK17-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
// CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[COMP_ADDR]] to i32*
// CHECK17-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
// CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4
// CHECK17-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 123)
// CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
// CHECK17-NEXT: ret void
//
//
// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK17-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 8
// CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK17-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 8
// CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 8
// CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK17-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK17-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK17-NEXT: ret void
//
//
// CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l169
// CHECK17-SAME: (%struct.SS* noundef [[THIS:%.*]], i64 noundef [[COMP:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
// CHECK17-NEXT: [[COMP_ADDR:%.*]] = alloca i64, align 8
// CHECK17-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK17-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
// CHECK17-NEXT: store i64 [[COMP]], i64* [[COMP_ADDR]], align 8
// CHECK17-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
// CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[COMP_ADDR]] to i32*
// CHECK17-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 1
// CHECK17-NEXT: [[TMP2:%.*]] = load float, float* [[B]], align 4
// CHECK17-NEXT: [[CONV1:%.*]] = fptosi float [[TMP2]] to i32
// CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV1]], 123
// CHECK17-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 456, i32 [[ADD]])
// CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[CONV]])
// CHECK17-NEXT: ret void
//
//
// CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
// CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK17-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 8
// CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK17-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 8
// CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 8
// CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK17-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK17-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK17-NEXT: ret void
//
//
// CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
// CHECK17-SAME: () #[[ATTR4:[0-9]+]] {
// CHECK17-NEXT: entry:
// CHECK17-NEXT: call void @__tgt_register_requires(i64 1)
// CHECK17-NEXT: ret void
//
//
// CHECK19-LABEL: define {{[^@]+}}@_Z21teams_template_structv
// CHECK19-SAME: () #[[ATTR0:[0-9]+]] {
// CHECK19-NEXT: entry:
// CHECK19-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
// CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(8) [[V]])
// CHECK19-NEXT: ret i32 [[CALL]]
//
//
// CHECK19-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
// CHECK19-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
// CHECK19-NEXT: entry:
// CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
// CHECK19-NEXT: [[COMP:%.*]] = alloca i32, align 4
// CHECK19-NEXT: [[COMP_CASTED:%.*]] = alloca i32, align 4
// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x i8*], align 4
// CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x i8*], align 4
// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x i8*], align 4
// CHECK19-NEXT: [[COMP_CASTED3:%.*]] = alloca i32, align 4
// CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [2 x i8*], align 4
// CHECK19-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [2 x i8*], align 4
// CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [2 x i8*], align 4
// CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
// CHECK19-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
// CHECK19-NEXT: store i32 1, i32* [[COMP]], align 4
// CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK19-NEXT: store i32 [[TMP0]], i32* [[COMP_CASTED]], align 4
// CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[COMP_CASTED]], align 4
// CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
// CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SS**
// CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP3]], align 4
// CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK19-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32**
// CHECK19-NEXT: store i32* [[A]], i32** [[TMP5]], align 4
// CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
// CHECK19-NEXT: store i8* null, i8** [[TMP6]], align 4
// CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
// CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
// CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP8]], align 4
// CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
// CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
// CHECK19-NEXT: store i32 [[TMP1]], i32* [[TMP10]], align 4
// CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
// CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4
// CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
// CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
// CHECK19-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
// CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[A2]], align 4
// CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
// CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
// CHECK19-NEXT: store i32 1, i32* [[TMP15]], align 4
// CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
// CHECK19-NEXT: store i32 2, i32* [[TMP16]], align 4
// CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
// CHECK19-NEXT: store i8** [[TMP12]], i8*** [[TMP17]], align 4
// CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
// CHECK19-NEXT: store i8** [[TMP13]], i8*** [[TMP18]], align 4
// CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
// CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP19]], align 4
// CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
// CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP20]], align 4
// CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
// CHECK19-NEXT: store i8** null, i8*** [[TMP21]], align 4
// CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
// CHECK19-NEXT: store i8** null, i8*** [[TMP22]], align 4
// CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
// CHECK19-NEXT: store i64 0, i64* [[TMP23]], align 8
// CHECK19-NEXT: [[TMP24:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 [[TMP14]], i32 123, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l161.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
// CHECK19-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
// CHECK19-NEXT: br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
// CHECK19: omp_offload.failed:
// CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l161(%struct.SS* [[THIS1]], i32 [[TMP1]]) #[[ATTR2:[0-9]+]]
// CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
// CHECK19: omp_offload.cont:
// CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK19-NEXT: store i32 [[TMP26]], i32* [[COMP_CASTED3]], align 4
// CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[COMP_CASTED3]], align 4
// CHECK19-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
// CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
// CHECK19-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to %struct.SS**
// CHECK19-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP29]], align 4
// CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
// CHECK19-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to float**
// CHECK19-NEXT: store float* [[B]], float** [[TMP31]], align 4
// CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
// CHECK19-NEXT: store i8* null, i8** [[TMP32]], align 4
// CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
// CHECK19-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32*
// CHECK19-NEXT: store i32 [[TMP27]], i32* [[TMP34]], align 4
// CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
// CHECK19-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32*
// CHECK19-NEXT: store i32 [[TMP27]], i32* [[TMP36]], align 4
// CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
// CHECK19-NEXT: store i8* null, i8** [[TMP37]], align 4
// CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
// CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
// CHECK19-NEXT: [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
// CHECK19-NEXT: [[TMP40:%.*]] = load float, float* [[B7]], align 4
// CHECK19-NEXT: [[CONV:%.*]] = fptosi float [[TMP40]] to i32
// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 123
// CHECK19-NEXT: [[KERNEL_ARGS8:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
// CHECK19-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS8]], i32 0, i32 0
// CHECK19-NEXT: store i32 1, i32* [[TMP41]], align 4
// CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS8]], i32 0, i32 1
// CHECK19-NEXT: store i32 2, i32* [[TMP42]], align 4
// CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS8]], i32 0, i32 2
// CHECK19-NEXT: store i8** [[TMP38]], i8*** [[TMP43]], align 4
// CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS8]], i32 0, i32 3
// CHECK19-NEXT: store i8** [[TMP39]], i8*** [[TMP44]], align 4
// CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS8]], i32 0, i32 4
// CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.2, i32 0, i32 0), i64** [[TMP45]], align 4
// CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS8]], i32 0, i32 5
// CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.3, i32 0, i32 0), i64** [[TMP46]], align 4
// CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS8]], i32 0, i32 6
// CHECK19-NEXT: store i8** null, i8*** [[TMP47]], align 4
// CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS8]], i32 0, i32 7
// CHECK19-NEXT: store i8** null, i8*** [[TMP48]], align 4
// CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS8]], i32 0, i32 8
// CHECK19-NEXT: store i64 0, i64* [[TMP49]], align 8
// CHECK19-NEXT: [[TMP50:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 456, i32 [[ADD]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l169.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS8]])
// CHECK19-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
// CHECK19-NEXT: br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED9:%.*]], label [[OMP_OFFLOAD_CONT10:%.*]]
// CHECK19: omp_offload.failed9:
// CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l169(%struct.SS* [[THIS1]], i32 [[TMP27]]) #[[ATTR2]]
// CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT10]]
// CHECK19: omp_offload.cont10:
// CHECK19-NEXT: [[TMP52:%.*]] = load i32, i32* [[COMP]], align 4
// CHECK19-NEXT: ret i32 [[TMP52]]
//
//
// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l161
// CHECK19-SAME: (%struct.SS* noundef [[THIS:%.*]], i32 noundef [[COMP:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK19-NEXT: entry:
// CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
// CHECK19-NEXT: [[COMP_ADDR:%.*]] = alloca i32, align 4
// CHECK19-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
// CHECK19-NEXT: store i32 [[COMP]], i32* [[COMP_ADDR]], align 4
// CHECK19-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
// CHECK19-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 0
// CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[A]], align 4
// CHECK19-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP2]], i32 123)
// CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[COMP_ADDR]])
// CHECK19-NEXT: ret void
//
//
// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK19-NEXT: entry:
// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK19-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 4
// CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK19-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 4
// CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 4
// CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK19-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK19-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK19-NEXT: ret void
//
//
// CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l169
// CHECK19-SAME: (%struct.SS* noundef [[THIS:%.*]], i32 noundef [[COMP:%.*]]) #[[ATTR3:[0-9]+]] {
// CHECK19-NEXT: entry:
// CHECK19-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
// CHECK19-NEXT: [[COMP_ADDR:%.*]] = alloca i32, align 4
// CHECK19-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK19-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
// CHECK19-NEXT: store i32 [[COMP]], i32* [[COMP_ADDR]], align 4
// CHECK19-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
// CHECK19-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP1]], i32 0, i32 1
// CHECK19-NEXT: [[TMP2:%.*]] = load float, float* [[B]], align 4
// CHECK19-NEXT: [[CONV:%.*]] = fptosi float [[TMP2]] to i32
// CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV]], 123
// CHECK19-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 456, i32 [[ADD]])
// CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32* [[COMP_ADDR]])
// CHECK19-NEXT: ret void
//
//
// CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1
// CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[COMP:%.*]]) #[[ATTR1]] {
// CHECK19-NEXT: entry:
// CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK19-NEXT: [[COMP_ADDR:%.*]] = alloca i32*, align 4
// CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK19-NEXT: store i32* [[COMP]], i32** [[COMP_ADDR]], align 4
// CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[COMP_ADDR]], align 4
// CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
// CHECK19-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
// CHECK19-NEXT: store i32 [[INC]], i32* [[TMP0]], align 4
// CHECK19-NEXT: ret void
//
//
// CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
// CHECK19-SAME: () #[[ATTR4:[0-9]+]] {
// CHECK19-NEXT: entry:
// CHECK19-NEXT: call void @__tgt_register_requires(i64 1)
// CHECK19-NEXT: ret void
//
//
// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l216
// CHECK25-SAME: (i64 noundef [[ARGC:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK25-NEXT: entry:
// CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8
// CHECK25-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8
// CHECK25-NEXT: [[CONV:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32*
// CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
// CHECK25-NEXT: ret void
//
//
// CHECK25-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK25-NEXT: entry:
// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8
// CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK25-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8
// CHECK25-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8
// CHECK25-NEXT: store i32 0, i32* [[TMP0]], align 4
// CHECK25-NEXT: ret void
//
//
// CHECK25-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIPPcEiT__l209
// CHECK25-SAME: (i8** noundef [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK25-NEXT: entry:
// CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i8**, align 8
// CHECK25-NEXT: store i8** [[ARGC]], i8*** [[ARGC_ADDR]], align 8
// CHECK25-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8***)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i8*** [[ARGC_ADDR]])
// CHECK25-NEXT: ret void
//
//
// CHECK25-LABEL: define {{[^@]+}}@.omp_outlined..1
// CHECK25-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8*** noundef nonnull align 8 dereferenceable(8) [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK25-NEXT: entry:
// CHECK25-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK25-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK25-NEXT: [[ARGC_ADDR:%.*]] = alloca i8***, align 8
// CHECK25-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK25-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK25-NEXT: store i8*** [[ARGC]], i8**** [[ARGC_ADDR]], align 8
// CHECK25-NEXT: [[TMP0:%.*]] = load i8***, i8**** [[ARGC_ADDR]], align 8
// CHECK25-NEXT: store i8** null, i8*** [[TMP0]], align 8
// CHECK25-NEXT: ret void
//
//
// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l216
// CHECK27-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK27-NEXT: entry:
// CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
// CHECK27-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
// CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[ARGC_ADDR]])
// CHECK27-NEXT: ret void
//
//
// CHECK27-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK27-NEXT: entry:
// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4
// CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK27-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4
// CHECK27-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4
// CHECK27-NEXT: store i32 0, i32* [[TMP0]], align 4
// CHECK27-NEXT: ret void
//
//
// CHECK27-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIPPcEiT__l209
// CHECK27-SAME: (i8** noundef [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK27-NEXT: entry:
// CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i8**, align 4
// CHECK27-NEXT: store i8** [[ARGC]], i8*** [[ARGC_ADDR]], align 4
// CHECK27-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8***)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i8*** [[ARGC_ADDR]])
// CHECK27-NEXT: ret void
//
//
// CHECK27-LABEL: define {{[^@]+}}@.omp_outlined..1
// CHECK27-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8*** noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK27-NEXT: entry:
// CHECK27-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK27-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK27-NEXT: [[ARGC_ADDR:%.*]] = alloca i8***, align 4
// CHECK27-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK27-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK27-NEXT: store i8*** [[ARGC]], i8**** [[ARGC_ADDR]], align 4
// CHECK27-NEXT: [[TMP0:%.*]] = load i8***, i8**** [[ARGC_ADDR]], align 4
// CHECK27-NEXT: store i8** null, i8*** [[TMP0]], align 4
// CHECK27-NEXT: ret void
//
//
// CHECK33-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l265
// CHECK33-SAME: (i64 noundef [[A:%.*]], i64 noundef [[B:%.*]], i64 noundef [[ARGC:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK33-NEXT: entry:
// CHECK33-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// CHECK33-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
// CHECK33-NEXT: [[ARGC_ADDR:%.*]] = alloca i64, align 8
// CHECK33-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
// CHECK33-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
// CHECK33-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
// CHECK33-NEXT: store i64 [[ARGC]], i64* [[ARGC_ADDR]], align 8
// CHECK33-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
// CHECK33-NEXT: [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i32*
// CHECK33-NEXT: [[CONV2:%.*]] = bitcast i64* [[ARGC_ADDR]] to i32*
// CHECK33-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK33-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK33-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
// CHECK33-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV2]])
// CHECK33-NEXT: ret void
//
//
// CHECK33-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK33-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK33-NEXT: entry:
// CHECK33-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK33-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK33-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 8
// CHECK33-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK33-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK33-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 8
// CHECK33-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 8
// CHECK33-NEXT: store i32 0, i32* [[TMP0]], align 4
// CHECK33-NEXT: ret void
//
//
// CHECK33-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIPPcEiT__l254
// CHECK33-SAME: (i64 noundef [[A:%.*]], i64 noundef [[B:%.*]], i8** noundef [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK33-NEXT: entry:
// CHECK33-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
// CHECK33-NEXT: [[B_ADDR:%.*]] = alloca i64, align 8
// CHECK33-NEXT: [[ARGC_ADDR:%.*]] = alloca i8**, align 8
// CHECK33-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK33-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8
// CHECK33-NEXT: store i64 [[B]], i64* [[B_ADDR]], align 8
// CHECK33-NEXT: store i8** [[ARGC]], i8*** [[ARGC_ADDR]], align 8
// CHECK33-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32*
// CHECK33-NEXT: [[CONV1:%.*]] = bitcast i64* [[B_ADDR]] to i32*
// CHECK33-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
// CHECK33-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV1]], align 4
// CHECK33-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
// CHECK33-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8***)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i8*** [[ARGC_ADDR]])
// CHECK33-NEXT: ret void
//
//
// CHECK33-LABEL: define {{[^@]+}}@.omp_outlined..1
// CHECK33-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8*** noundef nonnull align 8 dereferenceable(8) [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK33-NEXT: entry:
// CHECK33-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK33-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK33-NEXT: [[ARGC_ADDR:%.*]] = alloca i8***, align 8
// CHECK33-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK33-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK33-NEXT: store i8*** [[ARGC]], i8**** [[ARGC_ADDR]], align 8
// CHECK33-NEXT: [[TMP0:%.*]] = load i8***, i8**** [[ARGC_ADDR]], align 8
// CHECK33-NEXT: store i8** null, i8*** [[TMP0]], align 8
// CHECK33-NEXT: ret void
//
//
// CHECK35-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l265
// CHECK35-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]], i32 noundef [[ARGC:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK35-NEXT: entry:
// CHECK35-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK35-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
// CHECK35-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
// CHECK35-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1:[0-9]+]])
// CHECK35-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
// CHECK35-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
// CHECK35-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
// CHECK35-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
// CHECK35-NEXT: [[TMP2:%.*]] = load i32, i32* [[B_ADDR]], align 4
// CHECK35-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
// CHECK35-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[ARGC_ADDR]])
// CHECK35-NEXT: ret void
//
//
// CHECK35-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK35-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK35-NEXT: entry:
// CHECK35-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK35-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK35-NEXT: [[ARGC_ADDR:%.*]] = alloca i32*, align 4
// CHECK35-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK35-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK35-NEXT: store i32* [[ARGC]], i32** [[ARGC_ADDR]], align 4
// CHECK35-NEXT: [[TMP0:%.*]] = load i32*, i32** [[ARGC_ADDR]], align 4
// CHECK35-NEXT: store i32 0, i32* [[TMP0]], align 4
// CHECK35-NEXT: ret void
//
//
// CHECK35-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIPPcEiT__l254
// CHECK35-SAME: (i32 noundef [[A:%.*]], i32 noundef [[B:%.*]], i8** noundef [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK35-NEXT: entry:
// CHECK35-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
// CHECK35-NEXT: [[B_ADDR:%.*]] = alloca i32, align 4
// CHECK35-NEXT: [[ARGC_ADDR:%.*]] = alloca i8**, align 4
// CHECK35-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]])
// CHECK35-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
// CHECK35-NEXT: store i32 [[B]], i32* [[B_ADDR]], align 4
// CHECK35-NEXT: store i8** [[ARGC]], i8*** [[ARGC_ADDR]], align 4
// CHECK35-NEXT: [[TMP1:%.*]] = load i32, i32* [[A_ADDR]], align 4
// CHECK35-NEXT: [[TMP2:%.*]] = load i32, i32* [[B_ADDR]], align 4
// CHECK35-NEXT: call void @__kmpc_push_num_teams(%struct.ident_t* @[[GLOB1]], i32 [[TMP0]], i32 [[TMP1]], i32 [[TMP2]])
// CHECK35-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i8***)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i8*** [[ARGC_ADDR]])
// CHECK35-NEXT: ret void
//
//
// CHECK35-LABEL: define {{[^@]+}}@.omp_outlined..1
// CHECK35-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i8*** noundef nonnull align 4 dereferenceable(4) [[ARGC:%.*]]) #[[ATTR0]] {
// CHECK35-NEXT: entry:
// CHECK35-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK35-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK35-NEXT: [[ARGC_ADDR:%.*]] = alloca i8***, align 4
// CHECK35-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK35-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK35-NEXT: store i8*** [[ARGC]], i8**** [[ARGC_ADDR]], align 4
// CHECK35-NEXT: [[TMP0:%.*]] = load i8***, i8**** [[ARGC_ADDR]], align 4
// CHECK35-NEXT: store i8** null, i8*** [[TMP0]], align 4
// CHECK35-NEXT: ret void
//
//
// CHECK41-LABEL: define {{[^@]+}}@_Z3foov
// CHECK41-SAME: () #[[ATTR0:[0-9]+]] {
// CHECK41-NEXT: entry:
// CHECK41-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
// CHECK41-NEXT: ret void
//
//
// CHECK41-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK41-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK41-NEXT: entry:
// CHECK41-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK41-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
// CHECK41-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
// CHECK41-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
// CHECK41-NEXT: ret void
//
//
// CHECK43-LABEL: define {{[^@]+}}@_Z3foov
// CHECK43-SAME: () #[[ATTR0:[0-9]+]] {
// CHECK43-NEXT: entry:
// CHECK43-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
// CHECK43-NEXT: ret void
//
//
// CHECK43-LABEL: define {{[^@]+}}@.omp_outlined.
// CHECK43-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
// CHECK43-NEXT: entry:
// CHECK43-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK43-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
// CHECK43-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
// CHECK43-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
// CHECK43-NEXT: ret void
//
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