Files
clang-p2996/llvm/test/CodeGen/AArch64/large-stack-cmp.ll
Momchil Velikov 50a97aacac [AArch64] Async unwind - function prologues
Re-commit of 32e8b550e5

This patch rearranges emission of CFI instructions, so the resulting
DWARF and `.eh_frame` information is precise at every instruction.

The current state is that the unwind info is emitted only after the
function prologue. This is fine for synchronous (e.g. C++) exceptions,
but the information is generally incorrect when the program counter is
at an instruction in the prologue or the epilogue, for example:

```
stp	x29, x30, [sp, #-16]!           // 16-byte Folded Spill
mov	x29, sp
.cfi_def_cfa w29, 16
...
```

after the `stp` is executed the (initial) rule for the CFA still says
the CFA is in the `sp`, even though it's already offset by 16 bytes

A correct unwind info could look like:
```
stp	x29, x30, [sp, #-16]!           // 16-byte Folded Spill
.cfi_def_cfa_offset 16
mov	x29, sp
.cfi_def_cfa w29, 16
...
```

Having this information precise up to an instruction is useful for
sampling profilers that would like to get a stack backtrace. The end
goal (towards this patch is just a step) is to have fully working
`-fasynchronous-unwind-tables`.

Reviewed By: danielkiss, MaskRay

Differential Revision: https://reviews.llvm.org/D111411
2022-03-24 16:16:44 +00:00

49 lines
1.4 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=arm64-apple-ios %s -o - | FileCheck %s
define void @foo() {
; CHECK-LABEL: foo:
; CHECK: ; %bb.0:
; CHECK-NEXT: stp x28, x27, [sp, #-32]! ; 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: stp x29, x30, [sp, #16] ; 16-byte Folded Spill
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: .cfi_offset w27, -24
; CHECK-NEXT: .cfi_offset w28, -32
; CHECK-NEXT: sub sp, sp, #1, lsl #12 ; =4096
; CHECK-NEXT: .cfi_def_cfa_offset 4128
; CHECK-NEXT: sub sp, sp, #80
; CHECK-NEXT: .cfi_def_cfa_offset 4208
; CHECK-NEXT: adds x8, sp, #1, lsl #12 ; =4096
; CHECK-NEXT: cmn x8, #32
; CHECK-NEXT: b.eq LBB0_2
; CHECK-NEXT: ; %bb.1: ; %false
; CHECK-NEXT: bl _baz
; CHECK-NEXT: b LBB0_3
; CHECK-NEXT: LBB0_2: ; %true
; CHECK-NEXT: bl _bar
; CHECK-NEXT: LBB0_3: ; %common.ret
; CHECK-NEXT: add sp, sp, #1, lsl #12 ; =4096
; CHECK-NEXT: add sp, sp, #80
; CHECK-NEXT: ldp x29, x30, [sp, #16] ; 16-byte Folded Reload
; CHECK-NEXT: ldp x28, x27, [sp], #32 ; 16-byte Folded Reload
; CHECK-NEXT: ret
%var = alloca i32, i32 12
%var2 = alloca i32, i32 1030
%tst = icmp eq i32* %var, null
br i1 %tst, label %true, label %false
true:
call void @bar()
ret void
false:
call void @baz()
ret void
}
declare void @bar()
declare void @baz()