6a82376012
Changes since aec08e:
* Adjust placement of a closing brace so that the general case actually runs. Turns out we had *no* coverage of the switch case. I added one in eae90fd.
* Drop .llvm.loop.* metadata from the new branch as there is no longer a loop to annotate.
Original commit message:
This special cases an unconditional latch and a conditional branch latch exit to improve codegen and test readability. I am hoping to reuse this function in the runtime unroll code, but without this change, the test diffs are far too complex to assess.
115 lines
5.0 KiB
LLVM
115 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; PR23538
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; RUN: opt < %s -indvars -loop-deletion -S | FileCheck %s
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; Check IndVarSimplify should not replace exit value because or else
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; udiv will be introduced by expand and the cost will be high.
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declare void @_Z3mixRjj(i32* dereferenceable(4), i32)
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declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
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declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
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define i32 @_Z3fooPKcjj(i8* nocapture readonly %s, i32 %len, i32 %c) {
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; CHECK-LABEL: @_Z3fooPKcjj(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
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; CHECK-NEXT: [[T:%.*]] = bitcast i32* [[A]] to i8*
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; CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 4, i8* [[T]])
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; CHECK-NEXT: store i32 -1640531527, i32* [[A]], align 4
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; CHECK-NEXT: [[CMP8:%.*]] = icmp ugt i32 [[LEN:%.*]], 11
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; CHECK-NEXT: br i1 [[CMP8]], label [[WHILE_BODY_LR_PH:%.*]], label [[WHILE_END:%.*]]
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; CHECK: while.body.lr.ph:
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; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
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; CHECK: while.body:
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; CHECK-NEXT: [[KEYLEN_010:%.*]] = phi i32 [ [[LEN]], [[WHILE_BODY_LR_PH]] ], [ [[SUB:%.*]], [[WHILE_BODY]] ]
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; CHECK-NEXT: [[S_ADDR_09:%.*]] = phi i8* [ [[S:%.*]], [[WHILE_BODY_LR_PH]] ], [ [[ADD_PTR:%.*]], [[WHILE_BODY]] ]
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; CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[S_ADDR_09]] to i32*
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; CHECK-NEXT: [[T2:%.*]] = load i32, i32* [[T1]], align 4
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; CHECK-NEXT: [[SHL_I:%.*]] = shl i32 [[T2]], 1
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; CHECK-NEXT: [[AND_I:%.*]] = and i32 [[SHL_I]], 16843008
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; CHECK-NEXT: [[T3:%.*]] = load i32, i32* [[A]], align 4
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; CHECK-NEXT: [[SUB_I:%.*]] = add i32 [[T3]], [[T2]]
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; CHECK-NEXT: [[ADD:%.*]] = sub i32 [[SUB_I]], [[AND_I]]
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; CHECK-NEXT: store i32 [[ADD]], i32* [[A]], align 4
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; CHECK-NEXT: [[ADD_PTR]] = getelementptr inbounds i8, i8* [[S_ADDR_09]], i64 12
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; CHECK-NEXT: [[SUB]] = add i32 [[KEYLEN_010]], -12
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; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[SUB]], 11
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; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_BODY]], label [[WHILE_COND_WHILE_END_CRIT_EDGE:%.*]]
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; CHECK: while.cond.while.end_crit_edge:
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; CHECK-NEXT: [[SUB_LCSSA:%.*]] = phi i32 [ [[SUB]], [[WHILE_BODY]] ]
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; CHECK-NEXT: br label [[WHILE_END]]
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; CHECK: while.end:
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; CHECK-NEXT: [[KEYLEN_0_LCSSA:%.*]] = phi i32 [ [[SUB_LCSSA]], [[WHILE_COND_WHILE_END_CRIT_EDGE]] ], [ [[LEN]], [[ENTRY:%.*]] ]
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; CHECK-NEXT: call void @_Z3mixRjj(i32* dereferenceable(4) [[A]], i32 [[KEYLEN_0_LCSSA]])
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; CHECK-NEXT: [[T4:%.*]] = load i32, i32* [[A]], align 4
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; CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 4, i8* [[T]])
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; CHECK-NEXT: ret i32 [[T4]]
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;
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entry:
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%a = alloca i32, align 4
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%t = bitcast i32* %a to i8*
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call void @llvm.lifetime.start.p0i8(i64 4, i8* %t)
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store i32 -1640531527, i32* %a, align 4
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%cmp8 = icmp ugt i32 %len, 11
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br i1 %cmp8, label %while.body.lr.ph, label %while.end
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while.body.lr.ph: ; preds = %entry
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br label %while.body
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while.body: ; preds = %while.body, %while.body.lr.ph
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%keylen.010 = phi i32 [ %len, %while.body.lr.ph ], [ %sub, %while.body ]
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%s.addr.09 = phi i8* [ %s, %while.body.lr.ph ], [ %add.ptr, %while.body ]
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%t1 = bitcast i8* %s.addr.09 to i32*
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%t2 = load i32, i32* %t1, align 4
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%shl.i = shl i32 %t2, 1
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%and.i = and i32 %shl.i, 16843008
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%t3 = load i32, i32* %a, align 4
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%sub.i = add i32 %t3, %t2
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%add = sub i32 %sub.i, %and.i
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store i32 %add, i32* %a, align 4
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%add.ptr = getelementptr inbounds i8, i8* %s.addr.09, i64 12
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%sub = add i32 %keylen.010, -12
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%cmp = icmp ugt i32 %sub, 11
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br i1 %cmp, label %while.body, label %while.cond.while.end_crit_edge
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while.cond.while.end_crit_edge: ; preds = %while.body
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%sub.lcssa = phi i32 [ %sub, %while.body ]
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br label %while.end
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while.end: ; preds = %while.cond.while.end_crit_edge, %entry
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%keylen.0.lcssa = phi i32 [ %sub.lcssa, %while.cond.while.end_crit_edge ], [ %len, %entry ]
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call void @_Z3mixRjj(i32* dereferenceable(4) %a, i32 %keylen.0.lcssa)
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%t4 = load i32, i32* %a, align 4
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call void @llvm.lifetime.end.p0i8(i64 4, i8* %t)
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ret i32 %t4
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}
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define i32 @zero_backedge_count_test(i32 %unknown_init, i32* %unknown_mem) {
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; CHECK-LABEL: @zero_backedge_count_test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[UNKNOWN_NEXT:%.*]] = load volatile i32, i32* [[UNKNOWN_MEM:%.*]], align 4
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; CHECK-NEXT: br label [[LEAVE:%.*]]
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; CHECK: leave:
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; CHECK-NEXT: ret i32 [[UNKNOWN_INIT:%.*]]
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;
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entry:
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br label %loop
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loop:
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%iv = phi i32 [ 0, %entry], [ %iv.inc, %loop ]
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%unknown_phi = phi i32 [ %unknown_init, %entry ], [ %unknown_next, %loop ]
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%iv.inc = add i32 %iv, 1
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%be_taken = icmp ne i32 %iv.inc, 1
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%unknown_next = load volatile i32, i32* %unknown_mem
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br i1 %be_taken, label %loop, label %leave
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leave:
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; We can fold %unknown_phi even though the backedge value for it is completely
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; unknown, since we can prove that the loop's backedge taken count is 0.
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%exit_val = phi i32 [ %unknown_phi, %loop ]
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ret i32 %exit_val
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}
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