7d6ca2ec57
Invalid IR in unreachable code is technically valid IR. In this case, the address space of the value was never inferred, and we tried to rewrite it with an invalid address space value which would assert.
29 lines
918 B
LLVM
29 lines
918 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
|
; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -S -infer-address-spaces %s | FileCheck %s
|
|
|
|
define amdgpu_kernel void @phi_self(i8 addrspace(1)* %arg) {
|
|
; CHECK-LABEL: @phi_self(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[I:%.*]] = phi i8 addrspace(1)* [ [[I]], [[LOOP]] ], [ [[ARG:%.*]], [[ENTRY:%.*]] ]
|
|
; CHECK-NEXT: [[I1:%.*]] = load i8, i8 addrspace(1)* [[I]], align 1
|
|
; CHECK-NEXT: [[I2:%.*]] = icmp eq i8 [[I1]], 0
|
|
; CHECK-NEXT: br i1 [[I2]], label [[LOOP]], label [[RET:%.*]]
|
|
; CHECK: ret:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
entry:
|
|
%cast = addrspacecast i8 addrspace(1)* %arg to i8*
|
|
br label %loop
|
|
|
|
loop:
|
|
%i = phi i8* [%i, %loop], [%cast, %entry]
|
|
%i1 = load i8, i8* %i, align 1
|
|
%i2 = icmp eq i8 %i1, 0
|
|
br i1 %i2, label %loop, label %ret
|
|
|
|
ret:
|
|
ret void
|
|
}
|