7d6ca2ec57
Invalid IR in unreachable code is technically valid IR. In this case, the address space of the value was never inferred, and we tried to rewrite it with an invalid address space value which would assert.
28 lines
1022 B
LLVM
28 lines
1022 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
|
; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -S -infer-address-spaces %s | FileCheck %s
|
|
|
|
define amdgpu_kernel void @subclass_data_assert() {
|
|
; CHECK-LABEL: @subclass_data_assert(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: unreachable
|
|
; CHECK: strlen.while11:
|
|
; CHECK-NEXT: [[I:%.*]] = getelementptr i8, i8* [[I]], i64 1
|
|
; CHECK-NEXT: [[I1:%.*]] = load i8, i8* [[I]], align 1
|
|
; CHECK-NEXT: [[I2:%.*]] = icmp eq i8 [[I1]], 0
|
|
; CHECK-NEXT: br i1 [[I2]], label [[STRLEN_WHILE_DONE12:%.*]], label [[STRLEN_WHILE11:%.*]]
|
|
; CHECK: strlen.while.done12:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
entry:
|
|
unreachable
|
|
|
|
strlen.while11: ; preds = %strlen.while11
|
|
%i = getelementptr i8, i8* %i, i64 1
|
|
%i1 = load i8, i8* %i, align 1
|
|
%i2 = icmp eq i8 %i1, 0
|
|
br i1 %i2, label %strlen.while.done12, label %strlen.while11
|
|
|
|
strlen.while.done12: ; preds = %strlen.while11
|
|
ret void
|
|
}
|