bf225939bc
- CUDA cannot associate memory space with pointer types. Even though Clang could add extra attributes to specify the address space explicitly on a pointer type, it breaks the portability between Clang and NVCC.
- This change proposes to assume the address space from a pointer from the assumption built upon target-specific address space predicates, such as `__isGlobal` from CUDA. E.g.,
```
foo(float *p) {
__builtin_assume(__isGlobal(p));
// From there, we could assume p is a global pointer instead of a
// generic one.
}
```
This makes the code portable without introducing the implementation-specific features.
Note that NVCC starts to support __builtin_assume from version 11.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D112041
99 lines
4.4 KiB
LLVM
99 lines
4.4 KiB
LLVM
;RUN: opt %s -aa-pipeline= -passes='adce,loop(loop-rotate),adce' -S -verify-cfg-preserved=0 -debug-pass-manager -debug-only=loop-rotate 2>&1 | FileCheck %s
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;RUN: opt %s -aa-pipeline= -passes='adce,loop-mssa(loop-rotate),adce' -S -verify-cfg-preserved=0 -debug-pass-manager -debug-only=loop-rotate -verify-memoryssa 2>&1 | FileCheck %s --check-prefix=MSSA
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;REQUIRES: asserts
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; This test is to make sure we invalidate the post dominator pass after loop rotate simplifies the loop latch.
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; The adce passes are here to make sure post dominator analysis is required.
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; CHECK: Running pass: ADCEPass on f
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; CHECK-NEXT: Running analysis: PostDominatorTreeAnalysis on f
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; CHECK-NEXT: Running pass: LoopSimplifyPass on f
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; CHECK-NEXT: Running analysis: LoopAnalysis on f
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; CHECK-NEXT: Running analysis: DominatorTreeAnalysis on f
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; CHECK-NEXT: Running analysis: AssumptionAnalysis on f
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; CHECK-NEXT: Running analysis: TargetIRAnalysis on f
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; CHECK-NEXT: Running pass: LCSSAPass on f
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; CHECK-NEXT: Running analysis: AAManager on f
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; CHECK-NEXT: Running analysis: TargetLibraryAnalysis on f
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; CHECK-NEXT: Running analysis: ScalarEvolutionAnalysis on f
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; CHECK-NEXT: Running analysis: InnerAnalysisManagerProxy{{.*}} on f
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; CHECK-NEXT: Running pass: LoopRotatePass on Loop at depth 1 containing: %bb<header><exiting>,%bb4<latch>
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; CHECK-NEXT: Folding loop latch bb4 into bb
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; CHECK-NEXT: Invalidating analysis: PostDominatorTreeAnalysis on f
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; CHECK-NEXT: Running pass: ADCEPass on f
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; CHECK-NEXT: Running analysis: PostDominatorTreeAnalysis on f
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; MSSA: Running pass: ADCEPass on f
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; MSSA-NEXT: Running analysis: PostDominatorTreeAnalysis on f
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; MSSA-NEXT: Running pass: LoopSimplifyPass on f
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; MSSA-NEXT: Running analysis: LoopAnalysis on f
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; MSSA-NEXT: Running analysis: DominatorTreeAnalysis on f
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; MSSA-NEXT: Running analysis: AssumptionAnalysis on f
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; MSSA-NEXT: Running analysis: TargetIRAnalysis on f
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; MSSA-NEXT: Running pass: LCSSAPass on f
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; MSSA-NEXT: Running analysis: MemorySSAAnalysis on f
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; MSSA-NEXT: Running analysis: AAManager on f
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; MSSA-NEXT: Running analysis: TargetLibraryAnalysis on f
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; MSSA-NEXT: Running analysis: ScalarEvolutionAnalysis on f
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; MSSA-NEXT: Running analysis: InnerAnalysisManagerProxy{{.*}} on f
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; MSSA-NEXT: Running pass: LoopRotatePass on Loop at depth 1 containing: %bb<header><exiting>,%bb4<latch>
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; MSSA-NEXT: Folding loop latch bb4 into bb
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; MSSA-NEXT: Invalidating analysis: PostDominatorTreeAnalysis on f
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; MSSA-NEXT: Running pass: ADCEPass on f
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; MSSA-NEXT: Running analysis: PostDominatorTreeAnalysis on f
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; CHECK-LABEL: define i8 @f() {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label %bb
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; CHECK: bb: ; preds = %bb, %entry
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; CHECK-NEXT: %mode.0 = phi i8 [ 0, %entry ], [ %indvar.next, %bb ]
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; CHECK-NEXT: %tmp5 = icmp eq i8 %mode.0, 1
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; CHECK-NEXT: %indvar.next = add i8 %mode.0, 1
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; CHECK-NEXT: br i1 %tmp5, label %bb5, label %bb
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; CHECK: bb5: ; preds = %bb
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; CHECK-NEXT: tail call void @raise_exception() #0
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; CHECK-NEXT: unreachable
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; CHECK-NEXT: }
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; CHECK: ; Function Attrs: noreturn
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; CHECK: declare void @raise_exception() #0
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; CHECK: attributes #0 = { noreturn }
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; MSSA-LABEL: define i8 @f() {
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; MSSA-NEXT: entry:
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; MSSA-NEXT: br label %bb
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; MSSA: bb: ; preds = %bb, %entry
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; MSSA-NEXT: %mode.0 = phi i8 [ 0, %entry ], [ %indvar.next, %bb ]
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; MSSA-NEXT: %tmp5 = icmp eq i8 %mode.0, 1
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; MSSA-NEXT: %indvar.next = add i8 %mode.0, 1
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; MSSA-NEXT: br i1 %tmp5, label %bb5, label %bb
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; MSSA: bb5: ; preds = %bb
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; MSSA-NEXT: tail call void @raise_exception() #0
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; MSSA-NEXT: unreachable
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; MSSA-NEXT: }
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; MSSA: ; Function Attrs: noreturn
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; MSSA: declare void @raise_exception() #0
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; MSSA: attributes #0 = { noreturn }
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define i8 @f() {
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entry:
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br label %bb
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bb: ; preds = %bb4, %entry
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%mode.0 = phi i8 [ 0, %entry ], [ %indvar.next, %bb4 ]
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%tmp5 = icmp eq i8 %mode.0, 1
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br i1 %tmp5, label %bb5, label %bb4
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bb4: ; preds = %bb2
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%indvar.next = add i8 %mode.0, 1
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br label %bb
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bb5: ; preds = %bb2
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tail call void @raise_exception() #0
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unreachable
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}
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; Function Attrs: noreturn
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declare void @raise_exception() #0
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attributes #0 = { noreturn }
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