de2fed6152
The unrolling code was previously inserting new cloned blocks at the end of the function. The result of this with typical loop structures is that the new iterations are placed far from the initial iteration. With unrolling, the general assumption is that the a) the loop is reasonable hot, and b) the first Count-1 copies of the loop are rarely (if ever) loop exiting. As such, placing Count-1 copies out of line is a fairly poor code placement choice. We'd much rather fall through into the hot (non-exiting) path. For code with branch profiles, later layout would fix this, but this may have a positive impact on non-PGO compiled code. However, the real motivation for this change isn't performance. Its readability and human understanding. Having to jump around long distances in an IR file to trace an unrolled loop structure is error prone and tedious.
161 lines
7.3 KiB
LLVM
161 lines
7.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -loop-unroll -unroll-runtime %s -o - | FileCheck %s
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; RUN: opt -S -loop-unroll -unroll-runtime -unroll-max-upperbound=6 %s -o - | FileCheck %s --check-prefix=UPPER
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target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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@global = dso_local local_unnamed_addr global i32 0, align 4
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@global.1 = dso_local local_unnamed_addr global i8* null, align 4
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; Check that loop in hoge_3, with a runtime upperbound of 3, is not unrolled.
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define dso_local void @hoge_3(i8 %arg) {
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; CHECK-LABEL: @hoge_3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[X:%.*]] = load i32, i32* @global, align 4
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; CHECK-NEXT: [[Y:%.*]] = load i8*, i8** @global.1, align 4
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; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X]], 17
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; CHECK-NEXT: br i1 [[TMP0]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]]
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; CHECK: loop.preheader:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ [[X]], [[LOOP_PREHEADER]] ]
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; CHECK-NEXT: [[PTR:%.*]] = phi i8* [ [[PTR_NEXT:%.*]], [[LOOP]] ], [ [[Y]], [[LOOP_PREHEADER]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 8
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; CHECK-NEXT: [[PTR_NEXT]] = getelementptr inbounds i8, i8* [[PTR]], i32 1
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; CHECK-NEXT: store i8 [[ARG:%.*]], i8* [[PTR_NEXT]], align 1
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[IV_NEXT]], 17
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; CHECK-NEXT: br i1 [[TMP1]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
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; CHECK: exit.loopexit:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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; UPPER-LABEL: @hoge_3(
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; UPPER-NEXT: entry:
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; UPPER-NEXT: [[X:%.*]] = load i32, i32* @global, align 4
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; UPPER-NEXT: [[Y:%.*]] = load i8*, i8** @global.1, align 4
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; UPPER-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X]], 17
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; UPPER-NEXT: br i1 [[TMP0]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]]
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; UPPER: loop.preheader:
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; UPPER-NEXT: br label [[LOOP:%.*]]
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; UPPER: loop:
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; UPPER-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ [[X]], [[LOOP_PREHEADER]] ]
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; UPPER-NEXT: [[PTR:%.*]] = phi i8* [ [[PTR_NEXT:%.*]], [[LOOP]] ], [ [[Y]], [[LOOP_PREHEADER]] ]
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; UPPER-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 8
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; UPPER-NEXT: [[PTR_NEXT]] = getelementptr inbounds i8, i8* [[PTR]], i32 1
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; UPPER-NEXT: store i8 [[ARG:%.*]], i8* [[PTR_NEXT]], align 1
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; UPPER-NEXT: [[TMP1:%.*]] = icmp ult i32 [[IV_NEXT]], 17
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; UPPER-NEXT: br i1 [[TMP1]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
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; UPPER: exit.loopexit:
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; UPPER-NEXT: br label [[EXIT]]
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; UPPER: exit:
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; UPPER-NEXT: ret void
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;
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entry:
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%x = load i32, i32* @global, align 4
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%y = load i8*, i8** @global.1, align 4
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%0 = icmp ult i32 %x, 17
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br i1 %0, label %loop, label %exit
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loop:
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%iv = phi i32 [ %x, %entry ], [ %iv.next, %loop ]
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%ptr = phi i8* [ %y, %entry ], [ %ptr.next, %loop ]
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%iv.next = add nuw i32 %iv, 8
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%ptr.next = getelementptr inbounds i8, i8* %ptr, i32 1
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store i8 %arg, i8* %ptr.next, align 1
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%1 = icmp ult i32 %iv.next, 17
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br i1 %1, label %loop, label %exit
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exit:
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ret void
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}
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; Check that loop in hoge_5, with a runtime upperbound of 5, is unrolled when -unroll-max-upperbound=4
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define dso_local void @hoge_5(i8 %arg) {
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; CHECK-LABEL: @hoge_5(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[X:%.*]] = load i32, i32* @global, align 4
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; CHECK-NEXT: [[Y:%.*]] = load i8*, i8** @global.1, align 4
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; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X]], 17
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; CHECK-NEXT: br i1 [[TMP0]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]]
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; CHECK: loop.preheader:
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; CHECK-NEXT: br label [[LOOP:%.*]]
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; CHECK: loop:
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; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[IV_NEXT:%.*]], [[LOOP]] ], [ [[X]], [[LOOP_PREHEADER]] ]
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; CHECK-NEXT: [[PTR:%.*]] = phi i8* [ [[PTR_NEXT:%.*]], [[LOOP]] ], [ [[Y]], [[LOOP_PREHEADER]] ]
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; CHECK-NEXT: [[IV_NEXT]] = add nuw i32 [[IV]], 4
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; CHECK-NEXT: [[PTR_NEXT]] = getelementptr inbounds i8, i8* [[PTR]], i32 1
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; CHECK-NEXT: store i8 [[ARG:%.*]], i8* [[PTR_NEXT]], align 1
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[IV_NEXT]], 17
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; CHECK-NEXT: br i1 [[TMP1]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
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; CHECK: exit.loopexit:
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; CHECK-NEXT: br label [[EXIT]]
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; CHECK: exit:
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; CHECK-NEXT: ret void
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;
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; UPPER-LABEL: @hoge_5(
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; UPPER-NEXT: entry:
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; UPPER-NEXT: [[X:%.*]] = load i32, i32* @global, align 4
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; UPPER-NEXT: [[Y:%.*]] = load i8*, i8** @global.1, align 4
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; UPPER-NEXT: [[TMP0:%.*]] = icmp ult i32 [[X]], 17
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; UPPER-NEXT: br i1 [[TMP0]], label [[LOOP_PREHEADER:%.*]], label [[EXIT:%.*]]
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; UPPER: loop.preheader:
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; UPPER-NEXT: br label [[LOOP:%.*]]
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; UPPER: loop:
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; UPPER-NEXT: [[IV_NEXT:%.*]] = add nuw i32 [[X]], 4
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; UPPER-NEXT: [[PTR_NEXT:%.*]] = getelementptr inbounds i8, i8* [[Y]], i32 1
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; UPPER-NEXT: store i8 [[ARG:%.*]], i8* [[PTR_NEXT]], align 1
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; UPPER-NEXT: [[TMP1:%.*]] = icmp ult i32 [[IV_NEXT]], 17
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; UPPER-NEXT: br i1 [[TMP1]], label [[LOOP_1:%.*]], label [[EXIT_LOOPEXIT:%.*]]
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; UPPER: loop.1:
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; UPPER-NEXT: [[IV_NEXT_1:%.*]] = add nuw i32 [[IV_NEXT]], 4
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; UPPER-NEXT: [[PTR_NEXT_1:%.*]] = getelementptr inbounds i8, i8* [[PTR_NEXT]], i32 1
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; UPPER-NEXT: store i8 [[ARG]], i8* [[PTR_NEXT_1]], align 1
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; UPPER-NEXT: [[TMP2:%.*]] = icmp ult i32 [[IV_NEXT_1]], 17
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; UPPER-NEXT: br i1 [[TMP2]], label [[LOOP_2:%.*]], label [[EXIT_LOOPEXIT]]
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; UPPER: loop.2:
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; UPPER-NEXT: [[IV_NEXT_2:%.*]] = add nuw i32 [[IV_NEXT_1]], 4
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; UPPER-NEXT: [[PTR_NEXT_2:%.*]] = getelementptr inbounds i8, i8* [[PTR_NEXT_1]], i32 1
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; UPPER-NEXT: store i8 [[ARG]], i8* [[PTR_NEXT_2]], align 1
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; UPPER-NEXT: [[TMP3:%.*]] = icmp ult i32 [[IV_NEXT_2]], 17
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; UPPER-NEXT: br i1 [[TMP3]], label [[LOOP_3:%.*]], label [[EXIT_LOOPEXIT]]
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; UPPER: loop.3:
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; UPPER-NEXT: [[IV_NEXT_3:%.*]] = add nuw i32 [[IV_NEXT_2]], 4
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; UPPER-NEXT: [[PTR_NEXT_3:%.*]] = getelementptr inbounds i8, i8* [[PTR_NEXT_2]], i32 1
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; UPPER-NEXT: store i8 [[ARG]], i8* [[PTR_NEXT_3]], align 1
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; UPPER-NEXT: [[TMP4:%.*]] = icmp ult i32 [[IV_NEXT_3]], 17
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; UPPER-NEXT: br i1 [[TMP4]], label [[LOOP_4:%.*]], label [[EXIT_LOOPEXIT]]
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; UPPER: loop.4:
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; UPPER-NEXT: [[IV_NEXT_4:%.*]] = add nuw i32 [[IV_NEXT_3]], 4
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; UPPER-NEXT: [[PTR_NEXT_4:%.*]] = getelementptr inbounds i8, i8* [[PTR_NEXT_3]], i32 1
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; UPPER-NEXT: store i8 [[ARG]], i8* [[PTR_NEXT_4]], align 1
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; UPPER-NEXT: [[TMP5:%.*]] = icmp ult i32 [[IV_NEXT_4]], 17
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; UPPER-NEXT: br i1 [[TMP5]], label [[LOOP_5:%.*]], label [[EXIT_LOOPEXIT]]
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; UPPER: loop.5:
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; UPPER-NEXT: [[PTR_NEXT_5:%.*]] = getelementptr inbounds i8, i8* [[PTR_NEXT_4]], i32 1
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; UPPER-NEXT: store i8 [[ARG]], i8* [[PTR_NEXT_5]], align 1
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; UPPER-NEXT: br label [[EXIT_LOOPEXIT]]
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; UPPER: exit.loopexit:
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; UPPER-NEXT: br label [[EXIT]]
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; UPPER: exit:
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; UPPER-NEXT: ret void
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;
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entry:
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%x = load i32, i32* @global, align 4
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%y = load i8*, i8** @global.1, align 4
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%0 = icmp ult i32 %x, 17
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br i1 %0, label %loop, label %exit
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loop:
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%iv = phi i32 [ %x, %entry ], [ %iv.next, %loop ]
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%ptr = phi i8* [ %y, %entry ], [ %ptr.next, %loop ]
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%iv.next = add nuw i32 %iv, 4
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%ptr.next = getelementptr inbounds i8, i8* %ptr, i32 1
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store i8 %arg, i8* %ptr.next, align 1
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%1 = icmp ult i32 %iv.next, 17
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br i1 %1, label %loop, label %exit
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exit:
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ret void
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}
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