e6ad9ef4e7
The basic idea to this is that a) having a single canonical type makes CSE easier, and b) many of our transforms are inconsistent about which types we end up with based on visit order. I'm restricting this to constants as for non-constants, we'd have to decide whether the simplicity was worth extra instructions. For constants, there are no extra instructions. We chose the canonical type as i64 arbitrarily. We might consider changing this to something else in the future if we have cause. Differential Revision: https://reviews.llvm.org/D115387
42 lines
1.8 KiB
LLVM
42 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -slp-vectorizer -instcombine -S | FileCheck %s
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; Regression test for a bug in the SLP vectorizer that was causing
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; these rotates to be incorrectly combined into a vector rotate.
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target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
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target triple = "wasm32-unknown-unknown"
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define void @foo(<2 x i64> %x, <4 x i32> %y, i64* %out) #0 {
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; CHECK-LABEL: @foo(
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; CHECK-NEXT: [[A:%.*]] = extractelement <2 x i64> [[X:%.*]], i64 0
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; CHECK-NEXT: [[B:%.*]] = extractelement <4 x i32> [[Y:%.*]], i64 2
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; CHECK-NEXT: [[CONV6:%.*]] = zext i32 [[B]] to i64
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; CHECK-NEXT: [[C:%.*]] = tail call i64 @llvm.fshl.i64(i64 [[A]], i64 [[A]], i64 [[CONV6]])
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; CHECK-NEXT: store i64 [[C]], i64* [[OUT:%.*]], align 8
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; CHECK-NEXT: [[D:%.*]] = extractelement <2 x i64> [[X]], i64 1
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; CHECK-NEXT: [[E:%.*]] = extractelement <4 x i32> [[Y]], i64 3
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; CHECK-NEXT: [[CONV17:%.*]] = zext i32 [[E]] to i64
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; CHECK-NEXT: [[F:%.*]] = tail call i64 @llvm.fshl.i64(i64 [[D]], i64 [[D]], i64 [[CONV17]])
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; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds i64, i64* [[OUT]], i32 1
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; CHECK-NEXT: store i64 [[F]], i64* [[ARRAYIDX2]], align 8
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; CHECK-NEXT: ret void
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;
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%a = extractelement <2 x i64> %x, i32 0
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%b = extractelement <4 x i32> %y, i32 2
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%conv6 = zext i32 %b to i64
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%c = tail call i64 @llvm.fshl.i64(i64 %a, i64 %a, i64 %conv6)
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store i64 %c, i64* %out
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%d = extractelement <2 x i64> %x, i32 1
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%e = extractelement <4 x i32> %y, i32 3
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%conv17 = zext i32 %e to i64
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%f = tail call i64 @llvm.fshl.i64(i64 %d, i64 %d, i64 %conv17)
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%arrayidx2 = getelementptr inbounds i64, i64* %out, i32 1
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store i64 %f, i64* %arrayidx2
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ret void
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}
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declare i64 @llvm.fshl.i64(i64, i64, i64)
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attributes #0 = {"target-cpu"="generic" "target-features"="+simd128"}
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