Nuri Amari 8cc8e5d6c6 Run ObjCContractPass in Default Codegen Pipeline (#92331) ...

Prior to this patch, when using -fthinlto-index= the ObjCARCContractPass isn't run prior to CodeGen, and instruction selection fails on IR containing arc intrinsics. This patch is motivated by that usecase.

The pass was previously added in various places codegen is performed. This patch adds the pass to the default codegen pipepline, makes sure it bails immediately if no arc intrinsics are found, and removes the adhoc scheduling of the pass. 

Co-authored-by: Nuri Amari <nuriamari@fb.com>

2024-05-23 10:04:55 -07:00

..

GlobalISel

[GISel][RISCV] Legalize G_FREM (#93063)

2024-05-24 00:34:06 +08:00

intrinsics

…

rv64-legal-i32

[SDAG] Improve SimplifyDemandedBits for mul (#90034)

2024-05-22 22:43:10 +08:00

rvv

[RISCV] Support postRA vsetvl insertion pass (#70549)

2024-05-21 14:42:55 +08:00

add-before-shl.ll

…

add-imm.ll

…

addc-adde-sube-subc.ll

…

addcarry.ll

…

addimm-mulimm.ll

[RISCV] Use RISCVISD::SHL_ADD in transformAddShlImm (#89832)

2024-05-13 09:48:46 -07:00

addrspacecast.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

aext-to-sext.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

aext.ll

…

align-loops.ll

…

align.ll

…

alloca.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

allow-check.ll

[CodeGen] Add default lowering for llvm.allow.{runtime,ubsan}.check() (#86049)

2024-03-31 22:19:33 -07:00

alu8.ll

…

alu16.ll

…

alu32.ll

…

alu64.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

analyze-branch.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

and-add-lsr.ll

[DAG] Avoid a crash when checking size of scalable type in visitANDLike

2024-02-05 14:30:10 -08:00

and.ll

…

arith-with-overflow.ll

…

atomic-cmpxchg-branch-on-result.ll

[RISCV] Remove experimental from Zacas. (#83195)

2024-02-28 21:46:58 -08:00

atomic-cmpxchg-flag.ll

…

atomic-cmpxchg.ll

[RISCV] Remove experimental from Zacas. (#83195)

2024-02-28 21:46:58 -08:00

atomic-fence.ll

…

atomic-load-store.ll

Revert "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)"

2024-04-26 12:16:53 +01:00

atomic-rmw-discard.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

atomic-rmw-sub.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

atomic-rmw.ll

AtomicExpand: Emit or with constant on RHS

2024-04-23 15:00:31 +02:00

atomic-signext.ll

AtomicExpand: Emit or with constant on RHS

2024-04-23 15:00:31 +02:00

atomicrmw-uinc-udec-wrap.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

attributes-module-flag.ll

[RISCV] Use 'riscv-isa' module flag to set ELF flags and attributes. (#85155)

2024-03-20 11:35:19 -07:00

attributes.ll

[RISCV] Zicfilp implies Zicsr. (#93143)

2024-05-23 15:32:04 +08:00

bf16-promote.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

bfloat-arith.ll

…

bfloat-br-fcmp.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

bfloat-convert.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

bfloat-fcmp.ll

…

bfloat-frem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

bfloat-imm.ll

…

bfloat-isnan.ll

…

bfloat-mem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

bfloat-select-fcmp.ll

…

bfloat-select-icmp.ll

…

bfloat.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

bitextract-mac.ll

…

bitreverse-shift.ll

[DAG] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (#89897)

2024-05-06 11:13:05 +01:00

bittest.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

blockaddress.ll

…

branch_zero.ll

…

branch-on-zero.ll

Revert "[LSR][TTI][RISCV] Disable terminator folding for RISC-V."

2024-01-11 13:20:02 -08:00

branch-opt.ll

…

branch-opt.mir

[RISCV] Make sure ADDI replacement in optimizeCondBranch has a virtual reg destination. (#81938)

2024-02-15 16:34:40 -08:00

branch-relaxation.ll

…

branch.ll

…

bswap-bitreverse.ll

…

bswap-shift.ll

…

byval.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

callee-saved-fpr32s.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

callee-saved-fpr64s.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

callee-saved-gprs.ll

[RISCV] Lower the TransientStackAlignment to the ABI alignment for rv32e/rv64e.

2024-02-09 21:48:11 -08:00

calling-conv-half.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-ilp32-ilp32f-common.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-ilp32-ilp32f-ilp32d-common.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-ilp32.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-ilp32d.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-ilp32e.ll

[RISCV] Register fixed stack slots for callee saved registers for -msave-restore/Zcmp (#81392)

2024-02-13 14:59:28 -08:00

calling-conv-ilp32f-ilp32d-common.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-lp64-lp64f-common.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-lp64-lp64f-lp64d-common.ll

[mi-sched] Suppress register pressure with i64. (#88256)

2024-04-15 13:11:45 +08:00

calling-conv-lp64.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-lp64e.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

calling-conv-rv32f-ilp32.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-rv32f-ilp32e.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

calling-conv-sext-zext.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calling-conv-vector-float.ll

[clang][RISCV] Change default abi with f extension but without d extension (#73489)

2023-12-15 11:16:05 +08:00

calling-conv-vector-on-stack.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

calls.ll

[RISCV][NFC] Simplify calls.ll and autogenerate checks for tail-calls.ll

2024-02-01 20:50:20 +08:00

cm_mvas_mvsa.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

cm_mvas_mvsa.mir

[RISCV] Add scheduling info for Zcmp (#82719)

2024-02-23 15:44:57 -08:00

cmov-branch-opt.ll

[RISCV] Graduate Zicond to non-experimental (#79811)

2024-01-29 15:58:54 +00:00

cmp-bool.ll

…

codemodel-lowering.ll

…

compress-double.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

compress-float.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

compress-inline-asm.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

compress-opt-branch.ll

[RISCV] Add Zca predicate to BrccCompressOpt patterns used for MinSize.

2024-04-05 12:39:39 -07:00

compress-opt-select.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

compress.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

condbinops.ll

[RISCV] Graduate Zicond to non-experimental (#79811)

2024-01-29 15:58:54 +00:00

condops.ll

[RISCV] Use APInt in useInversedSetcc to prevent crashes when mask is larger than UINT64_MAX. (#81888)

2024-02-15 10:48:52 -08:00

copy-frameindex.mir

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

copyprop.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

copysign-casts.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

ctlz-cttz-ctpop.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

ctz_zero_return_test.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

disable-tail-calls.ll

…

disjoint.ll

…

div_minsize.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

div-by-constant.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

div-pow2.ll

…

div.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

double_reduct.ll

[RISCV] Remove unecessary early exit in transferBefore (#74040)

2023-12-12 17:25:19 +09:00

double-arith-strict.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-arith.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-bitmanip-dagcombines.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-br-fcmp.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-calling-conv.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-convert-strict.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-convert.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

double-fcmp-strict.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-fcmp.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-frem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

double-imm.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-intrinsics-strict.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-intrinsics.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-isnan.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-maximum-minimum.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-mem.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-previous-failure.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-round-conv-sat.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

double-round-conv.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-select-fcmp.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-select-icmp.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-stack-spill-restore.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

double-zfa.ll

…

dso_local_equivalent.ll

…

dwarf-eh.ll

…

early-clobber-tied-def-subreg-liveness.ll

[RISCV] Support postRA vsetvl insertion pass (#70549)

2024-05-21 14:42:55 +08:00

eh-dwarf-cfa.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

elf-preemption.ll

…

emutls.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

exception-pointer-register.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fastcc-float.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fastcc-int.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fastcc-without-f-reg.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

fixups-diff.ll

[MC] Rename temporary symbols of empty name to ".L0 " (#89693)

2024-04-26 08:30:27 -07:00

fli-licm.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

float-arith-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-arith.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-bit-preserving-dagcombines.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-bitmanip-dagcombines.ll

[clang][RISCV] Change default abi with f extension but without d extension (#73489)

2023-12-15 11:16:05 +08:00

float-br-fcmp.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-convert-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-convert.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

float-fcmp-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-fcmp.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-frem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-imm.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

float-intrinsics-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-intrinsics.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-isnan.ll

…

float-maximum-minimum.ll

…

float-mem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-round-conv-sat.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

float-round-conv.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

float-select-fcmp.ll

…

float-select-icmp.ll

…

float-select-verify.ll

[MIRPrinter] Don't print line break when there is no instructions (NFC) (#80147)

2024-02-01 22:10:52 +08:00

float-zfa.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

flt-rounds.ll

…

fmax-fmin.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fold-addi-loadstore.ll

[RISCV] Enable -riscv-enable-sink-fold by default. (#82026)

2024-02-22 09:07:21 -08:00

fold-binop-into-select.ll

…

forced-atomics.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

fp16-promote.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fp128.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

fpclamptosat.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

fpenv.ll

…

frame-info.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

frame.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

frameaddr-returnaddr.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

frm-dependency.ll

…

get-register-invalid.ll

…

get-register-noreserve.ll

…

get-register-reserve.ll

…

get-setcc-result-type.ll

…

ghccc-nest.ll

…

ghccc-rv32.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

ghccc-rv64.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

ghccc-without-f-reg.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

global-merge-offset.ll

…

global-merge.ll

…

graalcc.ll

[IR] Add GraalVM calling conventions

2023-11-17 16:30:09 +00:00

half-arith-strict.ll

…

half-arith.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-bitmanip-dagcombines.ll

[clang][RISCV] Change default abi with f extension but without d extension (#73489)

2023-12-15 11:16:05 +08:00

half-br-fcmp.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-convert-strict.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

half-convert.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

half-fcmp-strict.ll

…

half-fcmp.ll

[clang][RISCV] Change default abi with f extension but without d extension (#73489)

2023-12-15 11:16:05 +08:00

half-frem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-imm.ll

…

half-intrinsics.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-isnan.ll

…

half-maximum-minimum.ll

…

half-mem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-round-conv-sat.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

half-round-conv.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

half-select-fcmp.ll

…

half-select-icmp.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

half-zfa-fli.ll

…

half-zfa.ll

…

hoist-global-addr-base.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

hwasan-check-memaccess.ll

…

i32-icmp.ll

…

i64-icmp.ll

…

iabs.ll

Revert "Revert "[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (#84921)" and more..."

2024-04-29 13:08:52 +02:00

idiv_large.ll

…

imm-cse.ll

…

imm.ll

[RISCV] Improve constant materialisation for stores of i8 negative constants (#92131)

2024-05-14 19:08:04 +01:00

indirectbr.ll

…

init-array.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

inline-asm-abi-names.ll

[RISCV] Remove gp and tp from callee saved register lists. (#76483)

2023-12-27 21:36:03 -08:00

inline-asm-clobbers.ll

…

inline-asm-d-abi-names.ll

…

inline-asm-d-constraint-f.ll

[RISCV] Use BuildPairF64 and SplitF64 for bitcast i64<->f64 on rv32 regardless of Zfa. (#85982)

2024-03-21 08:52:51 -07:00

inline-asm-f-abi-names.ll

…

inline-asm-f-constraint-f.ll

…

inline-asm-i-constraint-i1.ll

…

inline-asm-invalid.ll

…

inline-asm-mem-constraint.ll

[RISCV] Teach RISCVMergeBaseOffset to handle inline asm (#78945)

2024-01-22 17:36:32 +08:00

inline-asm-s-constraint-error.ll

[RISCV] Support constraint "s" (#80201)

2024-02-01 10:18:42 -08:00

inline-asm-s-constraint.ll

[RISCV] Support constraint "s" (#80201)

2024-02-01 10:18:42 -08:00

inline-asm-zfh-constraint-f.ll

…

inline-asm.ll

…

inline-option-directive.ll

…

interrupt-attr-args-error.ll

…

interrupt-attr-callee.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

interrupt-attr-invalid.ll

…

interrupt-attr-nocall.ll

[RISCV] Remove interrupt handler special case from RISCVFrameLowering::determineCalleeSaves. (#88069)

2024-04-10 10:28:54 -07:00

interrupt-attr-ret-error.ll

…

interrupt-attr.ll

[RISCV] Remove interrupt handler special case from RISCVFrameLowering::determineCalleeSaves. (#88069)

2024-04-10 10:28:54 -07:00

intrinsic-cttz-elts-vscale.ll

[RISCV] Support postRA vsetvl insertion pass (#70549)

2024-05-21 14:42:55 +08:00

intrinsic-cttz-elts.ll

[RISCV] Provide a more efficient lowering for experimental.cttz.elts. (#88552)

2024-04-15 18:38:54 -07:00

isel-optnone.ll

…

jumptable-swguarded.ll

[RISCV] Use software guarded branch for indirect jump table branch. (#66762)

2024-05-14 14:44:25 +08:00

jumptable.ll

[RISCV] Add MinimumJumpTableEntries to TuneInfo (#72963)

2023-11-23 14:05:23 +08:00

kcfi-isel-mir.ll

…

kcfi-mir.ll

…

kcfi-patchable-function-prefix.ll

…

kcfi.ll

…

lack-of-signed-truncation-check.ll

[RISCV] Enable the TypePromotion pass from AArch64/ARM.

2024-02-13 09:57:48 -08:00

large-stack.ll

…

legalize-fneg.ll

…

libcall-tail-calls.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

lit.local.cfg

…

live-sp.mir

[MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001)

2024-03-18 10:37:59 -04:00

llvm.exp10.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

llvm.frexp.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

load-setcc-combine.ll

[DAGCombiner] Allow tryToFoldExtOfLoad to use a sextload for zext nneg. (#81714)

2024-02-17 11:37:13 -08:00

local-stack-slot-allocation.ll

[RISCV] Don't exlude the frame pointer from the callee saved registers in RISCVRegisterInfo::needsFrameBaseReg.

2024-05-13 12:58:30 -07:00

loop-strength-reduce-add-cheaper-than-mul.ll

…

loop-strength-reduce-loop-invar.ll

[RISCV][LSR] Account for temporary register for base addition (#92296)

2024-05-22 13:38:39 -07:00

lsr-legaladdimm.ll

…

machine-combiner-mir.ll

…

machine-combiner-strategies.ll

…

machine-combiner.ll

[RISCV] Model integer min max instructions from Zbb execute in late-B ALU

2024-03-14 06:02:53 -07:00

machine-combiner.mir

…

machine-cp.mir

Revert "[MCP] Enhance MCP copy Instruction removal for special case (#70778)"

2023-11-27 19:39:40 +01:00

machine-cse.ll

…

machine-outliner-and-machine-copy-propagation.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

machine-outliner-cfi.mir

…

machine-outliner-patchable.ll

…

machine-outliner-position.mir

…

machine-outliner-throw.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

machinelicm-address-pseudos.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

machineoutliner-jumptable.mir

…

machineoutliner-pcrel-lo.mir

…

machineoutliner.mir

…

MachineSink-implicit-x0.mir

…

macro-fusion-lui-addi.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

macro-fusions.mir

[RISCV] Fix macro-fusions.mir

2023-12-22 14:49:59 +08:00

make-compressible-for-store-address.mir

…

make-compressible-rv64.mir

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

make-compressible-zbc.mir

[RISCV] Teach RISCVMakeCompressible handle byte/half load/store for Zcb. (#83375)

2024-03-27 13:40:38 +08:00

make-compressible.mir

[RISCV] Teach RISCVMakeCompressible handle Zca/Zcf/Zce/Zcd. (#81844)

2024-02-22 15:51:19 +08:00

mem64.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

mem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

memcpy-inline.ll

[RISCV] Re-separate unaligned scalar and vector memory features in the backend. (#88954)

2024-04-16 15:40:32 -07:00

memcpy.ll

[RISCV] Re-separate unaligned scalar and vector memory features in the backend. (#88954)

2024-04-16 15:40:32 -07:00

memset-inline.ll

[RISCV] Re-separate unaligned scalar and vector memory features in the backend. (#88954)

2024-04-16 15:40:32 -07:00

min-max.ll

…

mir-target-flags.ll

[RISCV] Merge machine operand flag MO_PLT into MO_CALL (#77253)

2024-01-07 12:43:39 -08:00

misched-load-clustering.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

misched-postra-direction.mir

[CodeGen][MISched] Add misched post-regalloc bidirectional scheduling (#77138)

2024-03-25 10:10:35 -04:00

miss-sp-restore-eh.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

module-elf-flags.ll

[RISCV] Use 'riscv-isa' module flag to set ELF flags and attributes. (#85155)

2024-03-20 11:35:19 -07:00

module-target-abi2.ll

…

module-target-abi3.ll

…

module-target-abi.ll

…

mul.ll

[SDAG] Improve SimplifyDemandedBits for mul (#90034)

2024-05-22 22:43:10 +08:00

musttail-call.ll

…

narrow-shl-cst.ll

…

neg-abs.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

nest-register.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

nomerge.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

nontemporal-scalable.ll

…

nontemporal.ll

…

O0-pipeline.ll

Run ObjCContractPass in Default Codegen Pipeline (#92331)

2024-05-23 10:04:55 -07:00

O3-pipeline.ll

Run ObjCContractPass in Default Codegen Pipeline (#92331)

2024-05-23 10:04:55 -07:00

opt-w-instrs.mir

[RISCV] Rework isSignExtendingOpW to store Register in the worklist.

2024-02-03 23:40:09 -08:00

option-nopic.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

option-norelax.ll

…

option-norvc.ll

…

option-pic.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

option-relax-relocation.ll

[RISCV] Force relocations if initial MCSubtargetInfo contains FeatureRelax (#77436)

2024-01-09 11:24:21 -08:00

option-relax.ll

…

option-rvc.ll

[RISCV] Support printing immediate of RISCV MCInst in hexadecimal format (#74053)

2023-12-14 22:42:11 -08:00

optnone-store-no-combine.ll

…

or-is-add.ll

[RISCV] Use disjoint flag in or_is_add.

2024-01-30 22:12:28 -08:00

out-of-reach-emergency-slot.mir

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

overflow-intrinsic-optimizations.ll

…

overflow-intrinsics.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

patchable-function-entry.ll

[MC] Parse SHF_LINK_ORDER argument before section group name (#77407)

2024-01-09 10:42:34 -08:00

pei-crash.ll

[RISCV] Fix crash in PEI with empty entry block with Zcmp (#72117)

2023-11-17 16:18:44 +01:00

pic-models.ll

…

pr40333.ll

…

pr51206.ll

[CGP] Permit tail call optimization on undefined return value

2024-02-22 10:09:15 +01:00

pr53662.mir

…

pr55201.ll

…

pr56110.ll

[RISCV] Re-separate unaligned scalar and vector memory features in the backend. (#88954)

2024-04-16 15:40:32 -07:00

pr56457.ll

…

pr58025.ll

…

pr58286.ll

…

pr58511.ll

…

pr63365.ll

…

pr63816.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

pr64503.ll

…

pr64645.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

pr64772.ll

…

pr64935.ll

…

pr65025.ll

…

pr66603.ll

…

pr68855.ll

…

pr69586.ll

[RISCV] Support postRA vsetvl insertion pass (#70549)

2024-05-21 14:42:55 +08:00

pr80052.mir

[StackSlotColoring] Ignore non-spill objects in RemoveDeadStores. (#80242)

2024-02-01 13:25:15 -08:00

pr84200.ll

[RISCV] Insert a freeze before converting select to AND/OR. (#84232)

2024-03-07 15:03:51 -08:00

pr84653_pr85190.ll

Add test cases for SELECT->AND miscompiles in DAGCombiner

2024-04-26 14:25:19 +02:00

pr88365.ll

[RISCV] Support uimm32 immediates in RISCVInstrInfo::movImm for RV32. (#88464)

2024-04-12 08:45:03 -07:00

pr89833.ll

[RISCV] Use the store value's VT as the MemoryVT after combining riscv.masked.strided.store (#89874)

2024-04-24 14:32:06 +08:00

pr90652.ll

[RISCV][ISel] Fix types in tryFoldSelectIntoOp (#90659)

2024-05-01 06:51:36 +08:00

pr90730.ll

[RISCV][ISel] Allow opaque constants in hasAndNotCompare (#92926)

2024-05-22 00:48:26 +08:00

pr92193.ll

[DAGCombiner] Mark vectors as not AllAddOne/AllSubOne on type mismatch (#92195)

2024-05-15 12:39:28 -07:00

prefer-w-inst.ll

[RISCV] Generate more W instructons

2024-04-16 15:37:31 +08:00

prefer-w-inst.mir

[RISCV] Generate more W instructons

2024-04-16 15:37:31 +08:00

prefetch.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

prolog-epilogue.ll

[RISCV] Exploit sh3add/sh2add for stack offsets by shifted 12-bit constants (#87950)

2024-04-08 14:53:21 -07:00

push-pop-opt-crash.ll

[RISCV] Fix typo in ABI name in test. NFC

2024-02-09 11:46:23 -08:00

push-pop-popret.ll

[RISCV] Add X27 to SavedRegs when X26 is in SavedRegs for cm.push/pop (#92067)

2024-05-14 08:06:10 -07:00

readcyclecounter.ll

…

readsteadycounter.ll

[RISCV] Support llvm.readsteadycounter intrinsic

2024-02-21 13:12:14 +08:00

reduce-unnecessary-extension.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

reduction-formation.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

regalloc-last-chance-recoloring-failure.ll

[RISCV] Support postRA vsetvl insertion pass (#70549)

2024-05-21 14:42:55 +08:00

relax-per-target-feature.ll

[RISCV] Update relax-per-target-feature.ll to use hexadecimal constants. NFC

2023-12-14 21:08:01 -08:00

rem.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

remat.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

repeated-fp-divisors.ll

…

reserved-reg-errors.ll

…

reserved-regs.ll

…

riscv-codegenprepare-asm.ll

Revert "[LSR][TTI][RISCV] Disable terminator folding for RISC-V."

2024-01-11 13:20:02 -08:00

riscv-codegenprepare.ll

[RISCV] Don't look for sext in RISCVCodeGenPrepare::visitAnd.

2024-01-19 14:44:47 -08:00

riscv-func-target-feature.ll

[RISCV] Re-separate unaligned scalar and vector memory features in the backend. (#88954)

2024-04-16 15:40:32 -07:00

riscv-shifted-extend.ll

…

rotl-rotr.ll

…

rv32-fuchsia.ll

…

rv32e.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

rv32i-rv64i-float-double.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv32i-rv64i-half.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv32xtheadba.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

rv32xtheadbb.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

rv32xtheadbs.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

rv32zba.ll

Reapply "[RISCV] Implement RISCVISD::SHL_ADD and move patterns into combine (#89263)"

2024-04-23 08:30:38 -07:00

rv32zbb-intrinsic.ll

…

rv32zbb-zbkb.ll

[RISCV] Insert a freeze before converting select to AND/OR. (#84232)

2024-03-07 15:03:51 -08:00

rv32zbb.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

rv32zbc-intrinsic.ll

…

rv32zbc-zbkc-intrinsic.ll

…

rv32zbkb-intrinsic.ll

…

rv32zbkb.ll

…

rv32zbkx-intrinsic.ll

…

rv32zbs.ll

[RISCV] Insert a freeze before converting select to AND/OR. (#84232)

2024-03-07 15:03:51 -08:00

rv32zimop-intrinsic.ll

[RISCV] Zimop/Zcmop are ratified

2024-04-08 16:40:02 +08:00

rv32zknd-intrinsic-autoupgrade.ll

…

rv32zknd-intrinsic.ll

…

rv32zkne-intrinsic-autoupgrade.ll

…

rv32zkne-intrinsic.ll

…

rv32zknh-intrinsic.ll

…

rv32zksed-intrinsic-autoupgrade.ll

…

rv32zksed-intrinsic.ll

…

rv32zksh-intrinsic.ll

…

rv64-large-stack.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv64-patchpoint.ll

[RISCV] Implement Statepoint and Patchpoint lowering to call instructions (#77337)

2024-04-11 12:19:56 +08:00

rv64-stackmap-frame-setup.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

rv64-stackmap-nops.ll

…

rv64-stackmap.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

rv64-statepoint-call-lowering-x1.ll

[RISCV] Implement Statepoint and Patchpoint lowering to call instructions (#77337)

2024-04-11 12:19:56 +08:00

rv64-statepoint-call-lowering-x2.ll

[RISCV] Implement Statepoint and Patchpoint lowering to call instructions (#77337)

2024-04-11 12:19:56 +08:00

rv64-statepoint-call-lowering.ll

[RISCV] Implement Statepoint and Patchpoint lowering to call instructions (#77337)

2024-04-11 12:19:56 +08:00

rv64-typepromotion.ll

[RISCV][TypePromotion] Dont generate truncs if PromotedType is greater than Source Type (#86941)

2024-03-28 21:22:05 -07:00

rv64d-double-convert-strict.ll

…

rv64d-double-convert.ll

…

rv64e.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

rv64f-float-convert-strict.ll

…

rv64f-float-convert.ll

…

rv64i-complex-float.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv64i-demanded-bits.ll

[RISCV][ISel] Eliminate andi rd, rs1, -1 instructions (#89976)

2024-04-25 14:22:14 +08:00

rv64i-double-softfloat.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv64i-exhaustive-w-insts.ll

…

rv64i-shift-sext.ll

…

rv64i-single-softfloat.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv64i-tricky-shifts.ll

…

rv64i-w-insts-legalization.ll

…

rv64m-exhaustive-w-insts.ll

…

rv64m-w-insts-legalization.ll

…

rv64xtheadba.ll

Reapply "[RISCV] Implement RISCVISD::SHL_ADD and move patterns into combine (#89263)"

2024-04-23 08:30:38 -07:00

rv64xtheadbb.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

rv64xtheadbs.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

rv64zba.ll

[SDAG] Improve SimplifyDemandedBits for mul (#90034)

2024-05-22 22:43:10 +08:00

rv64zbb-intrinsic.ll

…

rv64zbb-zbkb.ll

…

rv64zbb.ll

[SDAG] Use shifts if ISD::MUL is illegal when lowering ISD::CTPOP (#86505)

2024-03-29 15:38:39 +08:00

rv64zbc-intrinsic.ll

…

rv64zbc-zbkc-intrinsic.ll

…

rv64zbkb-intrinsic.ll

…

rv64zbkb.ll

…

rv64zbkx-intrinsic.ll

…

rv64zbs.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

rv64zfh-half-convert-strict.ll

…

rv64zfh-half-convert.ll

…

rv64zfh-half-intrinsics.ll

…

rv64zfhmin-half-convert-strict.ll

…

rv64zfhmin-half-convert.ll

…

rv64zfhmin-half-intrinsics.ll

…

rv64zimop-intrinsic.ll

[RISCV] Zimop/Zcmop are ratified

2024-04-08 16:40:02 +08:00

rv64zknd-intrinsic.ll

…

rv64zknd-zkne-intrinsic.ll

…

rv64zkne-intrinsic.ll

…

rv64zknh-intrinsic-autoupgrade.ll

…

rv64zknh-intrinsic.ll

…

rv64zksed-intrinsic-autoupgrade2.ll

…

rv64zksed-intrinsic-autoupgrade.ll

…

rv64zksed-intrinsic.ll

…

rv64zksh-intrinsic-autoupgrade.ll

…

rv64zksh-intrinsic.ll

…

rvv-cfi-info.ll

[RISCV] Add CFI information for vector callee-saved registers (#86811)

2024-04-17 10:42:40 +08:00

sadd_sat_plus.ll

[RISCV] Custom type legalize i32 SADDSAT/SSUBSAT without Zbb.

2024-02-04 23:15:58 -08:00

sadd_sat.ll

[RISCV] Custom type legalize i32 SADDSAT/SSUBSAT without Zbb.

2024-02-04 23:15:58 -08:00

saverestore-scs.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

saverestore.ll

…

sdata-limit-0.ll

…

sdata-limit-4.ll

…

sdata-limit-8.ll

…

sdata-local-sym.ll

…

sdiv-pow2-cmov.ll

…

select-and.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

select-bare.ll

…

select-binop-identity.ll

[RISCV] Graduate Zicond to non-experimental (#79811)

2024-01-29 15:58:54 +00:00

select-cc.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

select-const.ll

…

select-constant-xor.ll

…

select-optimize-multiple.ll

…

select-optimize-multiple.mir

…

select-or.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

select-to-and-zext.ll

…

select.ll

[RISC-V][ISel] Remove redundant czero.eqz like 'czero.eqz a0, a0, a0' (#90208)

2024-04-28 13:28:14 +08:00

selectcc-to-shiftand.ll

…

setcc-logic.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

sext-zext-trunc.ll

[DAGCombiner][RISCV] CSE zext nneg and sext. (#82597)

2024-02-22 09:06:49 -08:00

sextw-removal-debug.mir

[RISCV] Ignore debug instructions in hasAllNBitUsers in RISCVOptWInstrs.

2023-12-03 21:27:50 -08:00

sextw-removal.ll

[SDAG] Improve SimplifyDemandedBits for mul (#90034)

2024-05-22 22:43:10 +08:00

shadowcallstack.ll

[RISCV] Add Zicfiss support to the shadow call stack implementation. (#68075)

2024-02-10 22:18:46 +08:00

shift-amount-mod.ll

…

shift-and.ll

…

shift-masked-shamt.ll

…

shifts.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

shl-demanded.ll

…

shlimm-addimm.ll

…

short-forward-branch-opt.ll

[RISCV] Enable PostRAScheduler for SiFive7 (#83166)

2024-02-29 09:57:15 -05:00

shrinkwrap-jump-table.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

shrinkwrap.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

sifive7-enable-intervals.mir

[RISCV] Add missing REQUIRES asserts to test (NFC)

2023-12-20 09:42:14 +01:00

signbit-test.ll

[RISCV] Enable the TypePromotion pass from AArch64/ARM.

2024-02-13 09:57:48 -08:00

signed-truncation-check.ll

[SelectionDAG] Allow FREEZE to be hoisted before integer SETCC. (#84241)

2024-03-08 10:17:54 -08:00

sink-icmp.ll

…

spill-fill-fold.ll

[RISCV] Use BuildPairF64 and SplitF64 for bitcast i64<->f64 on rv32 regardless of Zfa. (#85982)

2024-03-21 08:52:51 -07:00

spill-fpr-scalar.ll

[RISCV] Rewrite spill-fpr-scalar.ll test to not use vsetvli. NFC (#91428)

2024-05-08 11:33:05 +08:00

spir-kernel-cc.ll

…

split-offsets.ll

[RISCV] Enable -riscv-enable-sink-fold by default. (#82026)

2024-02-22 09:07:21 -08:00

split-sp-adjust.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

split-store.ll

…

split-udiv-by-constant.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

split-urem-by-constant.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

srem-lkk.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

srem-seteq-illegal-types.ll

[RISCV] Support postRA vsetvl insertion pass (#70549)

2024-05-21 14:42:55 +08:00

srem-vector-lkk.ll

[RISCV] Enable -riscv-enable-sink-fold by default. (#82026)

2024-02-22 09:07:21 -08:00

srodata.ll

[RISCV] Place mergeable small read only data into srodata section (#82214)

2024-03-11 13:57:06 +08:00

ssub_sat_plus.ll

[RISCV] Custom type legalize i32 SADDSAT/SSUBSAT without Zbb.

2024-02-04 23:15:58 -08:00

ssub_sat.ll

[RISCV] Custom type legalize i32 SADDSAT/SSUBSAT without Zbb.

2024-02-04 23:15:58 -08:00

stack-folding.ll

[RISCV] Remove gp and tp from callee saved register lists. (#76483)

2023-12-27 21:36:03 -08:00

stack-inst-compress.mir

[MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001)

2024-03-18 10:37:59 -04:00

stack-offset.ll

[RISCV] Exploit sh3add/sh2add for stack offsets by shifted 12-bit constants (#87950)

2024-04-08 14:53:21 -07:00

stack-protector-target.ll

[RISCV] Use the thread local stack protector for Android targets (#87672)

2024-05-13 08:52:59 -07:00

stack-realignment-with-variable-sized-objects.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

stack-realignment.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

stack-slot-coloring.mir

…

stack-slot-size.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

stack-store-check.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

subtarget-features-std-ext.ll

…

switch-width.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

tagged-globals.ll

…

tail-calls.ll

[RISCV][NFC] Simplify calls.ll and autogenerate checks for tail-calls.ll

2024-02-01 20:50:20 +08:00

target-abi-invalid.ll

…

target-abi-valid.ll

[RISCV] CodeGen of RVE and ilp32e/lp64e ABIs (#76777)

2024-01-16 20:44:30 +08:00

thread-pointer.ll

…

tls-models.ll

[RISCV] Support TLSDESC in the RISC-V backend (#66915)

2024-01-23 16:16:07 -08:00

tlsdesc-symbol.ll

[llvm][lld] Pre-commit tests for RISCV TLSDESC symbols

2024-03-20 13:39:39 -07:00

trunc-free.ll

…

typepromotion-overflow.ll

Recommit "[TypePromotion] Support positive addition amounts in isSafeWrap. (#81690)"

2024-03-11 12:39:38 -07:00

uadd_sat_plus.ll

…

uadd_sat.ll

…

umulo-128-legalisation-lowering.ll

[MachineCombiner] Don't ignore PHI depths (#82025)

2024-03-14 11:47:29 -04:00

unaligned-load-store.ll

[RISCV] Improve constant materialisation for stores of i8 negative constants (#92131)

2024-05-14 19:08:04 +01:00

unfold-masked-merge-scalar-variablemask.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

unroll-loop-cse.ll

[RISCV] Remove blank lines at the end of testcases. NFC.

2024-01-02 13:13:04 +08:00

urem-lkk.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

urem-seteq-illegal-types.ll

[RISCV] Consider truncate semantics in performBUILD_VECTORCombine (#81168)

2024-02-08 11:28:06 -08:00

urem-vector-lkk.ll

[RISCV] Enable -riscv-enable-sink-fold by default. (#82026)

2024-02-22 09:07:21 -08:00

usub_sat_plus.ll

…

usub_sat.ll

…

vararg-ilp32e.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

vararg.ll

[RISCV] Lower the TransientStackAlignment to the ABI alignment for rv32e/rv64e.

2024-02-09 21:48:11 -08:00

vector-abi.ll

[RISCV] Merge machine operand flag MO_PLT into MO_CALL (#77253)

2024-01-07 12:43:39 -08:00

verify-instr.mir

…

vlenb.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

vscale-demanded-bits.ll

…

wide-mem.ll

…

wide-scalar-shift-by-byte-multiple-legalization.ll

…

wide-scalar-shift-legalization.ll

…

xaluo.ll

[RISCV] Use SHL_ADD in remaining strength reduce cases for MUL (#89789)

2024-04-23 12:40:55 -07:00

xcvbi.ll

[RISCV] Codegen support for XCVbi extension (#89719)

2024-05-08 11:22:16 +08:00

xcvbitmanip.ll

[RISCV] Implement intrinsics for XCVbitmanip extension in CV32E40P (#74993)

2023-12-17 19:29:40 +08:00

xtheadfmemidx.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

xtheadmac.ll

…

xtheadmemidx.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

xtheadmempair.ll

[CodeGen] Convert tests to opaque pointers (NFC)

2024-02-05 14:07:09 +01:00

zbb-cmp-combine.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

zcb-regalloc-hints.ll

[RISCV] Add regalloc hints for Zcb instructions. (#78949)

2024-01-23 09:33:06 -08:00

zcmp-additional-stack.ll

[RISCV] Align stack size down to a multiple of 16 before using cm.push/pop. (#86073)

2024-03-26 21:37:19 -07:00

zcmp-cm-popretz.mir

[RISCV] Add correct Uses, Defs, isReturn to Zcmp (#81039)

2024-02-07 14:30:45 -08:00

zcmp-cm-push-pop.mir

[RISCV] Add correct Uses, Defs, isReturn to Zcmp (#81039)

2024-02-07 14:30:45 -08:00

zcmp-prolog-epilog-crash.mir

…

zcmp-with-float.ll

[RISCV] Remove stale comment from test. NFC (#81098)

2024-02-12 09:19:28 -08:00

zdinx-asm-constraint.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

zdinx-boundary-check.ll

[RISCV] Use REG_SEQUENCE/EXTRACT_SUBREG to move between individual GPRs and GPRPair. (#85887)

2024-03-20 08:44:24 -07:00

zdinx-large-spill.mir

[RISCV] Preserve MMO when expanding PseudoRV32ZdinxSD/PseudoRV32ZdinxLD. (#85877)

2024-03-26 20:42:14 -07:00

zext-with-load-is-free.ll

[RISCV] Remove setJumpIsExpensive(). (#74647)

2023-12-13 09:37:25 -08:00

zfbfmin.ll

…

zfh-half-intrinsics-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

zfh-half-intrinsics.ll

…

zfhmin-half-intrinsics-strict.ll

[RISCV] Omit "@plt" in assembly output "call foo@plt" (#72467)

2024-01-07 12:09:44 -08:00

zfhmin-half-intrinsics.ll

…

zfhmin-imm.ll

…

zicfilp-indirect-branch.ll

[RISCV] Avoid using x7/t2 for indirect branches which need landing pad. (#68292)

2024-05-02 10:32:40 +08:00

zmmul.ll

…